Somit L Talwar

US Patent:

6365476, Apr 2, 2002

Filed:

Oct 27, 2000

Appl. No.:

09/698670

Inventors:

Somit Talwar - Palo Alto CA
Yun Wang - San Jose CA

Assignee:

Ultratech Stepper, Inc. - San Jose CA

International Classification:

H01L 21336

US Classification:

438308, 438301, 438303, 438305, 438306, 438535, 438530, 438527, 438514

Abstract:

A simplified and cost reduced process for fabricating a field-effect transistor semiconductor device ( ) using laser radiation is disclosed. The process includes the step of forming removable first dielectric spacers ( R) on the sides ( ) of the gate ( ). Dopants are implanted into the substrate ( ) and the substrate is annealed to form an active deep source ( ) and an active deep drain ( ). The sidewall spacers are removed, and then a blanket pre-amorphization implant is performed to form source and drain amorphized regions ( ) that include respective extension regions ( ) that extend up to the gate. A layer of material ( is deposited over the source and drain extensions, the layer being opaque to a select wavelength of laser radiation ( ). The layer is then irradiated with laser radiation of the select wavelength so as to selectively melt the amorphized source and drain extensions, but not the underlying substrate. This causes dopants in the deep source to diffuse into the molten source extension, and dopants in the deep drain to diffuse into the molten drain extension.

US Patent:

6380044, Apr 30, 2002

Filed:

Apr 12, 2000

Appl. No.:

09/548326

Inventors:

Somit Talwar - Palo Alto CA
Yun Wang - San Jose CA
Michael O. Thompson - Ithaca NY

Assignee:

Ultratech Stepper, Inc. - San Jose CA

International Classification:

H01L 21336

US Classification:

438308, 438795

Abstract:

A high-speed semiconductor transistor and process for forming same. The process includes forming, in a Si substrate ( ), spaced apart shallow trench isolations (STIs) ( ), and a gate ( ) atop the substrate between the STIs. Then, regions ( ) of the substrate on either side of the gate are either amorphized and doped, or just doped. In certain embodiments of the invention, extension regions ( or â) and deep drain and deep source regions ( or â) are formed. In other embodiments, just deep drain and deep source regions ( or â) are formed. A conformal layer ( ) is then formed atop the substrate, covering the substrate surface ( ) and the gate. The conformal layer can serve to absorb light and/or to distribute heat to the underlying structures. Then, at least one of front-side irradiation ( ) and back-side irradiation ( ) is performed to activate the drain and source regions and, if present, the extensions. Explosive recrystallization ( ) is one mechanism used to achieve dopant activation.

US Patent:

6383956, May 7, 2002

Filed:

Aug 20, 2001

Appl. No.:

09/933795

Inventors:

Andrew M. Hawryluk - Los Altos Hills CA
Somit Talwar - Palo Alto CA
Yun Wang - San Jose CA
Michael O. Thompson - Ithaca NY

Assignee:

Ultratech Stepper, Inc. - San Jose CA

International Classification:

H01L 21324

US Classification:

438795

Abstract:

A method, apparatus and system for controlling the amount of heat transferred to a process region ( ) of a workpiece (W) from exposure with laser radiation ( ) using a thermally induced reflectivity switch layer ( ). The apparatus of the invention is a film stack ( ) having an absorber layer ( ) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs laser radiation and converts the absorbed radiation into heat. A reflective switch layer ( ) is deposited atop the absorber layer. The reflective switch layer may comprise one or more thin film layers, and preferably includes a thermal insulator layer and a transition layer. The portion of the reflective switch layer covering the process region has a temperature that corresponds to the temperature of the process region. The reflectivity of the reflectivity switch layer changes from a low reflectivity state to a high reflectivity state at a critical temperature so as to limit the amount of radiation absorbed by the absorber layer by reflecting the incident radiation.

US Patent:

6387803, May 14, 2002

Filed:

Sep 21, 1998

Appl. No.:

09/158346

Inventors:

Somit Talwar - Palo Alto CA
Gaurav Verma - Palo Alto CA
Karl-Josef Kramer - Vaihingen, DE
Kurt Weiner - San Jose CA

Assignee:

Ultratech Stepper, Inc. - San Jose CA

International Classification:

H01L 2144

US Classification:

438682, 438533, 438586, 438592, 438619, 438623, 438680

Abstract:

The invented method produces a silicide region on a silicon body that is useful for a variety of purposes, including the reduction of the electrical contact resistance to the silicon body or an integrated electronic device formed thereon. The invented method includes a step of producing an amorphous region on the silicon body using ion implantation, for example, a step of forming a metal layer such as titanium, cobalt or nickel in contact with the amorphous region, and a step of irradiating the metal with intense light from a source such as a laser, to cause metal atoms to diffuse into the amorphous region to form an alloy region with a silicide composition. In an application of the invented method to the manufacture of a MISFET device, the metal layer is preferably formed with a thickness that is at least sufficient to produce a stoichiometric proportion of metal and silicon atoms in the amorphous region of the gate of the MISFET device. Importantly, the irradiating step proceeds until the metal overlying the gate alloy region is consumed and the gate alloy region is exposed. The gate alloy region has a higher reflectivity than the metal layer, and thus reduces further thermal loading of the gate alloy region so that silicide growth can be continued in the source and drain regions without adversely impacting the gate of the MISFET device.

US Patent:

6388297, May 14, 2002

Filed:

Apr 12, 2000

Appl. No.:

09/547834

Inventors:

Somit Talwar - Palo Alto CA
John Cronin - Milton VT

Assignee:

Ultratech Stepper, Inc. - San Jose CA

International Classification:

H01L 2120

US Classification:

257396, 257436

Abstract:

A shallow trench isolation (STI) structure ( ), formed in a silicon substrate ( ) for use in sub-micron integrated circuit devices, for providing enhanced absorption of a wavelength of laser light during laser annealing. The STI structure includes a shallow trench ( ) having a depth of 0. 5 m or less etched in the silicon substrate, and an optical blocking member ( ) that includes an insulator ( ) formed in the shallow trench and designed to reflect or absorb the wavelength of laser light to mitigate redistribution of the dopant and/or recrystallization of a portion of the silicon substrate. Methods of forming the optical blocking member are also disclosed.

US Patent:

6420264, Jul 16, 2002

Filed:

Jun 28, 2001

Appl. No.:

09/896160

Inventors:

Somit Talwar - Los Gatos CA
Yun Wang - San Jose CA

Assignee:

Ultratech Stepper, Inc. - San Jose CA

International Classification:

H01L 2144

US Classification:

438682, 438592, 438662, 438664, 438302, 438306, 438655

Abstract:

A method of forming a silicide region ( ) on a Si substrate ( ) in the manufacturing of semiconductor integrated devices, a method of forming a semiconductor device (MISFET), and a device having suicide regions formed by the present method. The method of forming a suicide region involves forming a silicide region ( ) in the (crystalline) Si substrate having an upper surface ( ) and a lower surface ( ). The method comprises the steps of first forming an amorphous doped region ( ) in the Si substrate at or near the upper surface, to a predetermined depth (d). This results in the formation of an amorphous-crystalline interface (I) between the amorphous doped region and the crystalline Si substrate. The next step is forming a metal layer ( ) atop the Si substrate upper surface, in contact with the amorphous doped region. The next step involves performing backside irradiation with a first radiation beam ( ).

US Patent:

6479821, Nov 12, 2002

Filed:

Sep 11, 2000

Appl. No.:

09/659094

Inventors:

Andrew M. Hawryluk - Los Altos Hills CA
Somit Talwar - Palo Alto CA
Yun Wang - San Jose CA
David A. Markle - Saratoga CA
Michael O. Thompson - Ithaca NY

Assignee:

Ultratech Stepper, Inc. - San Jose CA

International Classification:

G03G 516

US Classification:

2503161, 438530

Abstract:

A method, apparatus and system for controlling the amount of heat transferred to a process region ( ) of a workpiece (W) from exposure with a pulse of radiation ( ), which may be in the form of a scanning beam (B), using a thermally induced phase switch layer ( ). The apparatus of the invention is a film stack ( ) having an absorber layer ( ) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs radiation and converts the absorbed radiation into heat. The phase switch layer is deposited above or below the absorber layer. The phase switch layer may comprise one or more thin film layers, and may include a thermal insulator layer and a phase transition layer. Because they are in close proximity, the portion of the phase switch layer covering the process region has a temperature that is close to the temperature of the process region. The phase of the phase switch layer changes from a first phase (e. g.

US Patent:

6495390, Dec 17, 2002

Filed:

Aug 27, 2001

Appl. No.:

09/940102

Inventors:

Andrew M. Hawryluk - Los Altos Hills CA
Somit Talwar - Palo Alto CA
Yun Wang - San Jose CA
Michael O. Thompson - Ithaca NY

Assignee:

Ultratech Stepper, Inc. - San Jose CA

International Classification:

H01L 2100

US Classification:

438 56, 438 24, 438 54

Abstract:

A method, apparatus and system for controlling the amount of heat transferred to a process region ( ) of a workpiece (W) from exposure with laser radiation ( ) using a thermally induced reflectivity switch layer ( ). The apparatus of the invention is a film stack ( ) having an absorber layer ( ) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs laser radiation and converts the absorbed radiation into heat. A reflective switch layer ( ) is deposited atop the absorber layer. The reflective switch layer may comprise one or more thin film layers, and preferably includes a thermal insulator layer and a transition layer. The portion of the reflective switch layer covering the process region has a temperature that corresponds to the temperature of the process region. The reflectivity of the reflectivity switch layer changes from a low reflectivity state to a high reflectivity state at a critical temperature so as to limit the amount of radiation absorbed by the absorber layer by reflecting the incident radiation.