Mamata A Patnaik

US Patent:

20070069295, Mar 29, 2007

Filed:

Sep 28, 2005

Appl. No.:

11/237634

Inventors:

Daniel Kerr - Orlando FL, US
Mamata Patnaik - Windermere FL, US
Mario Pita - Harmony FL, US
Venkat Raghavan - Union City CA, US
Alan Chen - Windermere FL, US

International Classification:

H01L 21/8238
H01L 21/8249
H01L 27/12

US Classification:

257351000, 438202000, 438234000, 257E21269

Abstract:

A BiCMOS method for forming bipolar junction transistors and CMOS devices in a substrate. To avoid erosion of the bipolar junction transistor material layers, gate spacers for the CMOS devices are formed while a bipolar junction transistor photoresist layer is in place. The photoresist layer is used for etching the emitter polysilicon layer (for single polysilicon layer bipolar junction transistors) or for etching the base polysilicon layer (for double polysilicon layer bipolar junction transistors) prior to gate spacer etch.

US Patent:

20070161173, Jul 12, 2007

Filed:

Dec 15, 2006

Appl. No.:

11/639847

Inventors:

Daniel Kerr - Orlando FL, US
Mamata Patnaik - Windermere FL, US
Mario Pita - Harmony FL, US
Venkat Raghavan - Union City CA, US
Alan Chen - Windermere FL, US

International Classification:

H01L 21/8234
H01L 21/8238
H01L 21/8249
H01L 21/302

US Classification:

438197000, 438202000, 438203000, 438204000, 438207000, 438234000, 438236000, 438723000, 438726000, 438733000, 438743000, 257E27109

Abstract:

A BiCMOS method for forming bipolar junction transistors and CMOS devices in a substrate. To avoid erosion of the bipolar junction transistor material layers, gate spacers for the CMOS devices are formed while a bipolar junction transistor photoresist layer is in place. The photoresist layer is used for etching the emitter polysilicon layer (for single polysilicon layer bipolar junction transistors) or for etching the base polysilicon layer (for double polysilicon layer bipolar junction transistors) prior to gate spacer etch.