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Zejian Wang

from San Jose, CA

Zejian Wang Phones & Addresses

  • San Jose, CA
  • Los Angeles, CA

Us Patents

  • Data Readout Power Saving Techniques For Shift Register Structure

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  • US Patent:
    20210368116, Nov 25, 2021
  • Filed:
    May 22, 2020
  • Appl. No.:
    16/882254
  • Inventors:
    - Santa Clara CA, US
    Zejian Wang - San Jose CA, US
    Jingwei Lai - San Jose CA, US
  • International Classification:
    H04N 5/369
    H04N 5/378
    H04N 5/376
    H04N 5/372
  • Abstract:
    A data transmission circuit of an image sensor. In one embodiment, the data transmission circuit includes a plurality of banks coupled in a series. A peripheral bank of the plurality of transmission banks is coupled to a function logic. Each bank includes a plurality of local buffers coupled to a local buffer control and a plurality of global buffers coupled to a global buffer control. The local buffers are settable to their enabled or disabled state by a bank enable command at the local buffer control. The enabled local buffers are configured to transfer local data to shift registers of their respective bank. The disabled local buffers are configured not to transfer the local data to the shift register of their respective bank.
  • Current Injection For Fast Ramp Start-Up During Analog-To-Digital Operations

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  • US Patent:
    20180324377, Nov 8, 2018
  • Filed:
    Jul 12, 2018
  • Appl. No.:
    16/034226
  • Inventors:
    - San Clara CA, US
    Yu-Shen Yang - San Jose CA, US
    Yingkan Lin - San Jose CA, US
    Zejian Wang - Sunnyvale CA, US
    Liping Deng - Cupertino CA, US
  • International Classification:
    H04N 5/378
    H03M 1/34
    H03K 4/90
    H03M 1/56
  • Abstract:
    An example method for fast ramp start-up during analog to digital conversion (ADC) includes opening a feedback bypass switch coupled to an amplifier to initiate an ADC operation, providing an injection current pulse to an inverting input of the amplifier, where the non-inverting input is coupled to a feedback bypass switch, integrating a first reference current coupled to the inverting input of the amplifier, where the integrating of the first reference current occurs due to the opening of the feedback bypass switch, and providing a reference voltage in response to the injection current pulse, the integrating of the first reference current, and a reference voltage coupled to a non-inverting input of the amplifier, where a level of the reference voltage is increased at least at initiation of the ADC operation in response to the injection current pulse.
  • Current Injection For Fast Ramp Start-Up During Analog-To-Digital Operations

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  • US Patent:
    20180167573, Jun 14, 2018
  • Filed:
    Dec 12, 2016
  • Appl. No.:
    15/376352
  • Inventors:
    - Santa Clara CA, US
    Yu-Shen Yang - San Jose CA, US
    Yingkan Lin - San Jose CA, US
    Zejian Wang - Sunnyvale CA, US
    Liping Deng - Cupertino CA, US
  • International Classification:
    H04N 5/378
    H03M 1/34
    H03M 1/66
    H03K 4/90
  • Abstract:
    An example method for fast ramp start-up during analog to digital conversion (ADC) includes opening a feedback bypass switch coupled to an amplifier to initiate an ADC operation, providing an injection current pulse to an inverting input of the amplifier, where the non-inverting input is coupled to a feedback bypass switch, integrating a first reference current coupled to the inverting input of the amplifier, where the integrating of the first reference current occurs due to the opening of the feedback bypass switch, and providing a reference voltage in response to the injection current pulse, the integrating of the first reference current, and a reference voltage coupled to a non-inverting input of the amplifier, where a level of the reference voltage is increased at least at initiation of the ADC operation in response to the injection current pulse.

Resumes

Zejian Wang Photo 1

Senior Analog Design Engineer

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Location:
Los Angeles, CA
Industry:
Semiconductors
Work:
Omnivision Technologies, Inc.
Senior Analog Design Engineer

Ucla Jan 2015 - Mar 2015
Reader

Zhejiang University Jun 2014 - Sep 2014
Research Assistant
Education:
University of California, Los Angeles 2013 - 2015
Master of Science, Masters, Electrical Engineering
Zhejiang University 2009 - 2013
Bachelors, Electrical Engineering
Skills:
Matlab
Verilog
Circuit Design
Cadence Virtuoso
Analog Circuit Design
Analog
Algorithms
Electrical Engineering
Vhdl
Modelsim
Asic Design
Layout Design
Mixed Signal Ic Design
Languages:
English
Mandarin
Zejian Wang Photo 2

Software Engineer

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Location:
Los Angeles, CA
Work:
Pinscreen
Software Engineer

Googleplus

Zejian Wang Photo 3

Zejian Wang

Zejian Wang Photo 4

Zejian Wang


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