Thomas J Debonis

US Patent:

7265032, Sep 4, 2007

Filed:

Sep 30, 2003

Appl. No.:

10/676303

Inventors:

Sujit Sharan - Chandler AZ, US
Thomas J. Debonis - Tempe AZ, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 21/00
H01L 23/544

US Classification:

438460, 438 33, 438 68, 438113, 438114, 438458, 438462, 438465, 257620

Abstract:

A method including forming a chemically soluble coating on a plurality exposed contacts on a surface of a circuit substrate; scribing the surface of the substrate along scribe areas; and after scribing, removing a portion of the coating. A method including forming a circuit structure comprises a plurality of exposed contacts on a surface, a location of the exposed contacts defined by a plurality of scribe streets; forming a coating comprising a chemically soluble material on the exposed contacts; scribing the surface of the substrate along the scribe streets; and after scribing, removing the coating. A method including coating a surface of a circuit substrate comprising a plurality of exposed contacts with a chemically soluble material; scribing the surface of the substrate along scribe areas; removing the coating; and sawing the substrate in the scribe areas.

US Patent:

7880124, Feb 1, 2011

Filed:

Nov 13, 2006

Appl. No.:

11/599529

Inventors:

Thomas Joseph DeBonis - Tempe AZ, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H05B 6/40
B23K 1/00

US Classification:

219603, 219605, 219656, 219635, 2281791

Abstract:

An embodiment of the present invention is a technique to package a device. Heat is localized on a die having bumps on a package substrate using a first induction heater operating at a first frequency. Heat is localized on at least an integrated heat spreader (IHS), a thermal interface material (TIM), an underfill, and a sealant on the die using a second induction heater operating at a second frequency.

US Patent:

20050284863, Dec 29, 2005

Filed:

Jun 24, 2004

Appl. No.:

10/876512

Inventors:

Thomas DeBonis - Tempe AZ, US

International Classification:

H05B006/10

US Classification:

219635000

Abstract:

An embodiment of the present invention is a technique to package a device. Heat is localized on a die having bumps on a package substrate using a first induction heater operating at a first frequency. Heat is localized on at least an integrated heat spreader (IHS), a thermal interface material (TIM), an underfill, and a sealant on the die using a second induction heater operating at a second frequency.

US Patent:

20200035658, Jan 30, 2020

Filed:

Jul 30, 2018

Appl. No.:

16/049696

Inventors:

- Santa Clara CA, US
Zhaozhi LI - Chandler AZ, US
Thomas J. DEBONIS - Tempe AZ, US
Robert NICKERSON - Chandler AZ, US
Rees WINTERS - Glendale AZ, US

International Classification:

H01L 25/18
H01L 23/31
H01L 21/56
H01L 25/00
H01L 21/48
H01L 23/544

Abstract:

Embodiments disclosed herein include an electronics package. In an embodiment, the electronics package comprises a package substrate and a die on the package substrate. In an embodiment, a mold layer is positioned over the package substrate. In an embodiment, the electronics package further comprises through-mold interconnects through the mold layer, and a trench that extends at least partially into the mold layer.