Hsu Kai Yang - Pleasanton CA, US Po-Kang Wang - Los Altos CA, US Takuma Murai - Santa Clara CA, US Takehiro Kamigama - Tokyo, JP
International Classification:
G06F 12/02 G06F 12/00 G06F 12/08
US Classification:
711103, 711118, 711E12001, 711E12008, 711E12017
Abstract:
Systems and methods for a SSD controller enabling data transfer between a host and flash memories have been achieved. A major component of the SSD controller is a non-volatile buffer memory, which interfaces fast disk drive protocols and slow write and read cycles of NAND flash. Preferably MRAM or Phase Change RAM can be used for the buffer memory. Non-volatile tables can also be implemented for storing dynamic logical to physical address translation, defective sector information and their spare sectors and/or SSD configuration parameters. data are kept in a buffer memory when the buffer memory is not powered