Swarup K Bhunia from 4000 NW 51St St #E84, Gainesville, FL 32606, age 74

Name / Title

Company / Classification

Phones & Addresses

Swarup Bhunia

HAKHAM SYSTEMS, LLC

Resumes

Professor And Steven Yaturo Faculty Fellow

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Location:

Cleveland, OH

Industry:

Higher Education

Work:

University of Florida
Professor and Steven Yaturo Faculty Fellow
Case Western Reserve University Jul 2011 - Jun 2015
Associate Professor
Purdue University 2000 - 2005
Graduate Student
Delsoft India 1998 - 2000
Senior Engineer
Interra Systems 1997 - 2000
Engineer

Education:

Purdue University 2000 - 2005
Doctorates, Doctor of Philosophy Indian Institute of Technology, Kharagpur 1995 - 1998
Masters, Master of Technology, Computer Science Jadavpur University 1991 - 1995
Bachelor of Engineering, Bachelors, Computer Science

Skills:

Matlab
Algorithms
Simulations
C
Signal Processing
Verilog
C++
Vlsi
Vhdl
Programming

Us Patents

Protection Of Intellectual Property Cores Through A Design Flow
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US Patent:

8402401, Mar 19, 2013
Filed:

Nov 9, 2010
Appl. No.:

12/942675
Inventors:

Rajat Subhra Chakraborty - West Bengal, IN
Seetharam Narasimhan - Cleveland OH, US
Swarup Bhunia - Shaker Heights OH, US
Assignee:

Case Western University - Cleveland OH
International Classification:

G06F 17/50
G06F 11/30
G06F 12/14
US Classification:

716102, 716110, 716106, 713189, 713193
Abstract:

One embodiment provides a method for protecting an integrated circuit chip design. The method can include storing in memory a circuit description of an integrated circuit core comprising a set of nodes and selecting a plurality of modification nodes from the set of nodes. A sequential structure can be inserted into the circuit description to provide a modified circuit description, the sequential structure utilizing the plurality of modification nodes as inputs. The modified circuit description can be stored in memory.

Synthesis Approach For Active Leakage Power Reduction Using Dynamic Supply Gating
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US Patent:

20070016808, Jan 18, 2007
Filed:

Jun 9, 2006
Appl. No.:

11/450711
Inventors:

Swarup Bhunia - West Lafayette IN, US
Nilanjan Banerjee - West Lafayette IN, US
Hamid Mahmoodi - San Francisco CA, US
Qikai Chen - West Lafayette IN, US
Kaushik Roy - West Lafayette IN, US
International Classification:

G06F 1/00
G06F 1/32
G06F 1/26
US Classification:

713300000, 713320000, 713323000, 713324000
Abstract:

A logic synthesis method to apply supply gating to idle portions of general logic circuits in their active mode of operation to reduce power requirements and the circuits resulting therefrom. A Shannon expansion is utilized to determine idle portions and active portions of the general logic circuits.

System And Method For A Battery On Wheels (Bow) For Charging Mobile Battery-Operated Units
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US Patent:

20210347275, Nov 11, 2021
Filed:

May 3, 2021
Appl. No.:

17/306553
Inventors:

- Gainesville FL, US
Swarup BHUNIA - Gainesville FL, US
Christopher M. Vega - Gainesville FL, US
International Classification:

B60L 53/35
B60L 53/67
B60L 53/66
B60L 53/57
B60L 53/53
B60W 60/00
B60L 58/12
G06Q 10/06
G06Q 50/30
G06Q 50/06
G06Q 20/12
G06Q 20/14
G01C 21/34
Abstract:

Apparatus, systems, and methods described herein relate generally to autonomous mobile units carrying a modular configurable battery system that may attach and power mobile units in transportation systems. A method can include determining charge levels, current positions, and transport speeds for an electric vehicle (EV), identifying one or more EVs in need of charging, and mobilizing a Mobile Charging Station (MoCS) to deliver one or more external batteries. A processor, with a memory including computer program code, can be configured to receive current charge level data for mobile battery-powered entities, identify one or more EVs to be charged and the proximity of both MoCS and physical battery stations, and send charging instructions to the EVs. A routing and charge transaction scheduling algorithm can be used to optimize the route of one or more battery-powered entities and to schedule charge transactions between the EV and MoCS and/or the battery station.

Multi-Level Battery Systems For Battery-Operated Entities, Methods For Rapid Charge Transfer Therebetween, And Methods For Optimizing Entity Routing And Network Charge Distribution
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US Patent:

20210284043, Sep 16, 2021
Filed:

Mar 5, 2021
Appl. No.:

17/193469
Inventors:

- Gainesville FL, US
Swarup BHUNIA - Gainesville FL, US
Prabuddha CHAKRABORTY - Gainesville FL, US
Robert PARKER - Gainesville FL, US
Rohan Reddy Kalavakonda - Gainesville FL, US
International Classification:

B60L 53/68
B60L 58/20
B60L 53/62
B60L 53/66
B60L 53/67
Abstract:

Apparatus, systems, and methods described herein relate generally to on-the-go entity-to-entity charging for multi-level battery-powered entities in transportation systems. A method can include determining charge levels, current positions, battery configuration, and transport speeds for an electric vehicle (EV), identifying one or more EVs in need of charging, and mobilizing a nearby EV for on-the-go peer-to-peer charging. A processor, with a memory including computer program code, can be configured to receive current charge level data for mobile battery-powered entities, identify one or more EVs to be charged and one or more other EVs that have excess charge to transfer, and send charging instructions to the EVs. A routing and charge transaction scheduling algorithm can be used to optimize the route of one or more battery-powered entities and to schedule charge transactions between EVs and/or a charging entity. A heuristic battery architecture compiler can be used to optimize battery architecture.

Nano-Electro-Mechanical Tags For Identification And Authentication
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US Patent:

20210221675, Jul 22, 2021
Filed:

Jan 19, 2021
Appl. No.:

17/152294
Inventors:

- Gainesville FL, US
Swarup Bhunia - Gainesville FL, US
International Classification:

B81C 1/00
H01L 41/083
H01L 41/18
H01L 41/39
H01L 41/27
H01L 41/047
H01L 41/29
Abstract:

A method for fabricating nano-electro-mechanical tags for identification and authentication includes, in part, forming a protective layer above a substrate, forming a first conductive layer above the protective layer serving as a first electrode, forming a piezoelectric layer above the first conductive layer, forming a second conductive layer above the piezoelectric layer, patterning the second conductive layer to form a second electrode, patterning the piezoelectric layer to expose one or more portions of the first conductive layer, and forming one or more trenches that extends into a plurality layers formed above. In addition, a sacrificial layer can be formed above portions of the substrate, and the sacrificial layer can be removed by etching to release the nano-electro-mechanical tags from the substrate.

System And Method For Charging A Network Of Mobile Battery-Operated Units On-The-Go
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US Patent:

20200262305, Aug 20, 2020
Filed:

Feb 5, 2020
Appl. No.:

16/782531
Inventors:

- Gainesville FL, US
Swarup BHUNIA - Gainesville FL, US
International Classification:

B60L 53/36
B60L 58/12
B60L 53/57
B60L 53/18
B60L 53/66
G01C 21/34
G06Q 50/06
G06Q 10/04
G06Q 20/14
Abstract:

Apparatus, systems, and methods described herein relate generally to on-the-go entity-to-entity charging in transportation systems. A method can include determining charge levels, current positions, and transport speeds for an electric vehicle (EV), identifying one or more EVs in need of charging, and mobilizing a nearby EV for on-the-go peer-to-peer charging. A processor, with a memory including computer program code, can be configured to receive current charge level data for mobile battery-powered entities, identify one or more EVs to be charged and one or more other EVs that have excess charge to transfer, and send charging instructions to the EVs. A routing and charge transaction scheduling algorithm can be used to optimize the route of one or more battery-powered entities and to schedule charge transactions between EVs and/or a charging entity.

Nano-Electro-Mechanical Labels And Encoder
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US Patent:

20190188546, Jun 20, 2019
Filed:

Jun 18, 2018
Appl. No.:

16/011509
Inventors:

- Gainesville FL, US
Swarup Bhunia - Gainesville FL, US
International Classification:

G06K 19/04
G06K 1/12
H01L 41/09
H01L 41/314
H01L 41/187
Abstract:

Data is encoded for identification and labeling using a multitude of nano-electro-mechanical structures formed on a substrate. The number of such structures, their shapes, choice of materials, the spacing therebetween and the overall distribution of the structures result in a vibrational pattern or an acoustic signature that uniquely corresponds to the encoded data. A first group of the structures is formed in conformity with the design rules of a fabrication process used to manufacture the device that includes the structures. A second group of the structures is formed so as not to conform to the design rules and thereby to undergo variability as a result of the statistical variations that is inherent in the fabrication process.

Uniquified Fpga Virtualization Approach To Hardware Security
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US Patent:

20180165478, Jun 14, 2018
Filed:

Dec 12, 2017
Appl. No.:

15/838526
Inventors:

- Gainesville FL, US
Kai Yang - Gainesville FL, US
Swarup Bhunia - Gainesville FL, US
Robert A. Karam - Gainesville FL, US
International Classification:

G06F 21/76
H04L 29/06
H04L 12/46
Abstract:

Novel methods of virtualization with unique virtual architectures on field-programmable gate arrays (FPGAs) are provided. A hardware security method can include providing one or more field-programmable gate arrays (FPGAs), and creating an application specialized virtual architecture (or overlay) over the one or more FPGAs (for example, by providing an overlay generator). Unique bitfiles that configure the overlays implemented on the FPGAs can be provided for each deployed FPGA. The application specialized virtual architecture can be constructed using application code, or functions from a domain, to create an overlay represented by one or more hardware description languages (e.g., VHDL).