Warm Shaw Yuan - San Diego CA, US Omer Fatih Acikel - San Diego CA, US
Assignee:
Applied Micro Circuits Corporation - San Diego CA
International Classification:
G06K005/04 G11B020/20 G11B005/00
US Classification:
714700, 714789, 714798
Abstract:
A system and method is provided for using phase adjustment in non-causal channel equalization in a communications system. The method comprising: receiving a serial data stream input; comparing a bit value in the serial data stream determined at a first phase with respect to a clock, to a bit value determined at a second phase; determining the optimal phase for the determination of bit values; and, using the optimal phase to determine subsequently received bit values. Typically, the serial data stream is encoded with forward error correction (FEC). Then, the method further comprises: FEC decoding the bit values determined at a plurality of phases. Determining the optimal phase for the determination of bit values includes calculating an error rate associated with the phases and, defining the optimal phase as the phase associated with a low error rate.
System And Method For Adjusting A Non-Return To Zero Data Stream Input Threshold
Omer Fatih Acikel - San Diego CA, US Warm Shaw Yuan - San Diego CA, US Daniel M. Castagnozzi - Lexington MA, US
Assignee:
Applied Micro Circuits Corporation - San Diego CA
International Classification:
H03M 5/02 H04L 1/20 H03M 5/14
US Classification:
714708, 341 68, 714709
Abstract:
A state machine method and system are provided for determining non-causal channel equalization thresholds. The method comprises: receiving a non-return to zero (NRZ) data stream encoded with forward error correction (FEC); setting x=0; in State , adjusting a third threshold (Vopt) in response to corrected bit errors; if x=0, setting a first and second threshold equal to the third threshold; in State , if x=0, simultaneously adjusting the first threshold and the second threshold, to minimize the total number of corrected bit errors; in State , following State , adjusting the first threshold, independent of the second threshold, to minimize the total number of errors; in State , following State , adjusting the second threshold, independent of the first threshold, to minimize the total number of errors; and, adding 1 to x and returning to State.
Omer Fatih Acikel - San Diego CA, US Warm Shaw Yuan - San Diego CA, US Alan Michael Sorgi - Poway CA, US
Assignee:
Applied Micro Circuits Corporation - San Diego CA
International Classification:
H03M 13/00
US Classification:
714709
Abstract:
A system and method are provided for non-causal channel equalization in a communications system. The method comprises: establishing three thresholds; receiving a binary serial data stream; comparing the first bit estimate in the data stream to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; data stream inputs below the first threshold and above the third threshold are a “0” if both the second and third bits are “1” values, and as a “1” if either of the second and third values is a “1”; data stream inputs above the second threshold and below the third threshold are a “1” if both the second and third bits are a “0” value, and as a “0” if either of the second and third values is a “0”.
Modified Gain Non-Causal Channel Equalization Using Feed-Forward And Feedback Compensation
Daniel M. Castagnozzi - Lexington MA, US Keith Michael Conroy - Salem NH, US Warm Shaw Yuan - San Diego CA, US Omer Fatih Acikel - San Diego CA, US
Assignee:
Applied Micro Circuits Corp. - San Diego CA
International Classification:
H04L 27/08
US Classification:
375233, 375345
Abstract:
A modified gain system and method are provided for non-causal channel equalization using feed-forward and feedback compensation. The method comprises: receiving a serial data stream first bit (present) input; comparing a second bit (past) value, received prior to the first bit input, to a third bit (future) value received subsequent to the first bit input; modifying the amplitude of the first bit input to compensate for the effect of the second and third bit values being equal; and, determining the value of the first bit input by comparing the amplitude modified first bit input to a Vopt threshold. When only one of the second and third bit values is a “1” value, a unity amplitude modifier is supplied. When the second and third bit values are a “1”, a low amplitude modifier is supplied. When the second and third bit values are a “0”, a high amplitude modifier is supplied.
Polarization Control For Multichannel And Polarization Multiplexed Optical Transport Networks
A system and method are provided for calibrating orthogonal polarity in a multichannel optical transport network (OTN) receiver. The method accepts a composite signal and separates the polarization of the signal into a pair of 2-phase shift keying (2-PSK) modulated input signals via Ix and Qx optical signal paths, where n≧1. Likewise, a pair of 2-PSK modulated input signals are accepted via Iy and Qy optical signal paths where p≧1. Polarization-adjusted I′x, Q′x, I′y, and Q′y signals are generated. An average magnitude is compared to either 2×the absolute magnitude of (I′x and Q′x), or 2×the absolute magnitude of (I′y and Q′y). The average magnitude value can be used that is either 2×(a predetermined peak signal amplitude), or the sum of the absolute magnitudes of (I′x and Q′x) and (I′y and Q′y). The polarization-adjusted I′x, Q′x, I′y, and Q′y signals are modified until the magnitude comparison is about zero.
The tracking of the phase of a received signal having a known preamble is accomplished by the steps of: initializing a phase-locked loop in accordance with estimated phase parameters, which are generated during an estimation interval by processing samples of the known preamble; delaying the preamble; generating phase error parameters by processing samples of the delayed preamble; and training the phase locked loop by tracking the phase-tracked signal in accordance with the tracking error parameters during a training interval after the estimation interval. The timing of the sampling is likewise trained in a closed timing loop in accordance with timing error parameters generated during the training interval after the timing loop has been initialized by estimated timing parameters generated during the estimation interval. The duration of the delay of the preamble is one-half the duration of the estimation interval.
Omer Fatih Acikel - San Diego CA, US Warm Shaw Yuan - San Diego CA, US Alan Michael Sorgi - Poway CA, US
Assignee:
Applied Micro Circuits Corporation - San Diego CA
International Classification:
H03M 13/00
US Classification:
714709, 375287
Abstract:
A system and method are provided for non-causal channel equalization in a communications system. The method comprises: establishing three thresholds; receiving a binary serial data stream; comparing the first bit estimate in the data stream to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; data stream inputs below the first threshold and above the third threshold are a “0” if both the second and third bits are “1” values, and as a “1” if either of the second and third values is a “1”; data stream inputs above the second threshold and below the third threshold are a “1” if both the second and third bits are a “0” value, and as a “0” if either of the second and third values is a “0”.
Omer Fatih Acikel - San Diego CA, US Warm Shaw Yuan - San Diego CA, US Alan Michael Sorgi - Poway CA, US
Assignee:
Applied Micro Circuits Corporation - San Diego CA
International Classification:
H03M 13/00
US Classification:
714709
Abstract:
A system and method are provided for non-causal channel equalization in a communications system. The method comprises: establishing three thresholds; receiving a binary serial data stream; comparing the first bit estimate in the data stream to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; data stream inputs below the first threshold and above the third threshold are a “0” if both the second and third bits are “1” values, and as a “1” if either of the second and third values is a “1”; data stream inputs above the second threshold and below the third threshold are a “1” if both the second and third bits are a “0” value, and as a “0” if either of the second and third values is a “0”.
Luxtera, Inc.
Dsp Design Engineer
Clariphy Communications Nov 2011 - May 2016
Senior Verification Engineer
Pmc-Sierra Dec 2010 - Oct 2011
Full-Time Contractor
L-3 Interstate Electronics Corporation Nov 2009 - Oct 2010
Dsp Engineer
Appliedmicro Jan 2008 - Nov 2009
Principal Engineer
Education:
New Mexico State University 1996 - 1999
Doctorates, Doctor of Philosophy
Skills:
Digital Signal Processors Algorithm Development Asic Systemverilog Algorithms Digital Signal Processing Wireless Soc Fpga Debugging Semiconductors Rtl Design Pll Uvm Functional Verification Mixed Signal Wimax Ic Analog Cmos Modems Signal Processing Vlsi Processors
Languages:
English Turkish
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