Mao Ito from San Jose, CA, age 37

Us Patents

Stacked Solid State Batteries And Methods Of Making The Same
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US Patent:

20210320323, Oct 14, 2021
Filed:

Feb 25, 2021
Appl. No.:

17/185122
Inventors:

Aditi CHANDRA - Los Gatos CA, US
Richard VAN DER LINDE - San Jose CA, US
Paul BUTLER - San Jose CA, US
Mao ITO - Santa Cruz CA, US
Jon SIMMONS - San Jose CA, US
Miki TRIFUNOVIC - San Jose CA, US
Alex YAN - San Jose CA, US
Arvind KAMATH - Los Altos CA, US
Shoba RAO - San Jose CA, US
International Classification:

H01M 10/0562
H01M 10/0583
H01M 50/178
Abstract:

A solid-state battery and a method of making the same are disclosed. The battery includes a base frame or support, first and second exterior contacts on the base frame/support, stacked solid-state battery unit cells, first and second electrical connections, and encapsulation in contact with the base frame/support and covering the solid-state battery unit cells and the electrical connections. Each stacked solid-state battery unit cell is on a metal substrate and has exposed cathode and anode current collectors. The electrical connections respectively electrically connect the exposed cathode and anode current collectors to the first and second exterior contacts. The method includes forming the stacked solid-state battery unit cells on the base frame/support, forming the exterior contacts on the base frame/support, electrically connecting the exposed cathode and anode current collectors to the respective exterior contacts, and encapsulating the solid-state battery unit cells and the electrical connections.

Solid-State Battery And Method Of Making The Same
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US Patent:

20210320355, Oct 14, 2021
Filed:

Feb 25, 2021
Appl. No.:

17/185111
Inventors:

Richard VAN DER LINDE - San Jose CA, US
Aditi CHANDRA - Los Gatos CA, US
Mao ITO - Santa Cruz CA, US
Alex YAN - San Jose CA, US
Arvind KAMATH - Los Altos CA, US
Shoba RAO - San Jose CA, US
Jon SIMMONS - San Jose CA, US
International Classification:

H01M 50/186
H01M 10/058
Abstract:

The present disclosure pertains to a battery and a method of making the same. The battery includes first and second metal substrates, a first solid-state and/or thin-film battery cell on the first metal substrate, a second solid-state and/or thin-film battery cell on the second metal substrate, and a hermetic seal in a peripheral region of the first and second metal substrates. The first and second battery cells are between the first and second metal substrates, and face each other. The method includes respectively forming first and second solid-state and/or thin-film battery cells on first and second metal substrates, placing the second battery cell on the first battery cell so that the first and second battery cells are between the first and second metal substrates, and hermetically sealing the first and second battery cells in a peripheral region of the first and second metal substrates.

Barriers For Flexible Substrates And Methods Of Making The Same
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US Patent:

20210074653, Mar 11, 2021
Filed:

Sep 3, 2020
Appl. No.:

17/012010
Inventors:

Miki TRIFUNOVIC - San Jose CA, US
Aditi CHANDRA - Los Gatos CA, US
Robert FULLER - San Jose CA, US
Raymond VASS - Bel Air MD, US
Patricia BECK - San Jose CA, US
Mao ITO - Santa Cruz CA, US
Arvind KAMATH - Los Altos CA, US
Assignee:

Thin Film Electronics ASA - Oslo
International Classification:

H01L 23/00
H01L 21/56
H01L 23/14
H01L 23/15
H01L 23/29
H01L 23/31
H01L 21/48
B81B 7/00
H01L 27/12
H01M 2/02
Abstract:

Embodiments of the disclosure pertain to a multi-layer barrier for a flexible substrate supporting electronic and/or microelectromechanical system (MEMS) devices. Apparatuses including a substrate, a first metal nitride layer, a first oxide layer on or over the first metal nitride layer, a second metal nitride layer and a second oxide layer on or over the first oxide layer, and a device layer on or over the first oxide layer or both the first and second oxide layers are disclosed. When the device layer is on or over the first oxide layer, the second metal nitride layer is on or over the device layer, and the second oxide layer is on or over the on or over the second metal nitride layer. When the device layer is on or over both the first and second oxide layers, the second metal nitride layer is on or over the second oxide layer. A method of making the same is also disclosed.

Printed And/Or Thin Film Integrated Circuit With Integrated Antenna, And Methods Of Making And Using The Same
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US Patent:

20190267698, Aug 29, 2019
Filed:

Feb 27, 2019
Appl. No.:

16/287126
Inventors:

Somnath MUKHERJEE - Milpitas CA, US
Aditi CHANDRA - Los Gatos CA, US
Mao ITO - Cupertino CA, US
Arvind KAMATH - Los Altos CA, US
Scott BRUNER - San Jose CA, US
Sambhu KUNDU - Fremont CA, US
Anand DESHPANDE - Cupertino CA, US
Assignee:

Thin Film Electronics ASA - Oslo
International Classification:

H01Q 1/22
H01L 23/532
H01L 23/66
H01L 23/64
H01L 23/522
H01L 23/528
Abstract:

A wireless communication device having an integrated antenna, and methods for making and using the same are disclosed. The device generally includes (a) a substrate; (b) an integrated circuit (IC) comprising a plurality of printed and/or thin film layers and/or structures on the substrate, (c) a dielectric or insulator layer in at least one area of the substrate other than the IC; and (d) an antenna on the dielectric or insulator layer, comprising one or more metal traces. The plurality of printed and/or thin film layers and/or structures include an uppermost layer of metal. The antenna has (i) an inner terminal continuous with the uppermost layer of metal or connected to the uppermost layer of metal through one or more contacts, and (ii) an outer terminal connected to the uppermost layer of metal through one or more contacts and optionally a metal bridge or strap

Electronic Device Having A Plated Antenna And/Or Trace, And Methods Of Making And Using The Same
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US Patent:

20180359858, Dec 13, 2018
Filed:

Dec 12, 2016
Appl. No.:

15/780217
Inventors:

Mao ITO - Santa Cruz CA, US
Assignee:

Thin Film Electronics ASA - Oslo
International Classification:

H05K 1/18
H05K 1/09
H05K 1/11
H05K 3/34
Abstract:

An electronic device, and methods of manufacturing the same are disclosed. The method of manufacturing the electronic device includes forming a first metal layer on a first substrate, forming an integrated circuit or a discrete electrical component on a second substrate, forming electrical connectors on input and/or output terminals of the integrated circuit or discrete electrical component, forming a second metal layer on the first metal layer, the second metal layer improving adhesion and/or electrical connectivity of the first metal layer to the electrical connectors on the integrated circuit or discrete electrical component, and electrically connecting the electrical connectors to the second metal layer.