Man Gu

US Patent:

20210242339, Aug 5, 2021

Filed:

Jan 30, 2020

Appl. No.:

16/776938

Inventors:

- Santa Clara CA, US
Man Gu - Malta NY, US
Baofu Zhu - Clifton Park NY, US

International Classification:

H01L 29/78
H01L 29/08
H01L 21/8238

Abstract:

Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A gate structure extends over a semiconductor body, a first source/drain region includes an epitaxial semiconductor layer on a first portion of the semiconductor body, and a second source/drain region is positioned in a second portion of the semiconductor body. The gate structure includes a first sidewall and a second sidewall opposite the first sidewall, the first source/drain region is positioned adjacent to the first sidewall of the gate structure, and the second source/drain region is positioned adjacent to the second sidewall of the gate structure. The first source/drain region has a first width, and the second source/drain region has a second width that is greater than the first width.

US Patent:

20210020515, Jan 21, 2021

Filed:

Jul 18, 2019

Appl. No.:

16/515638

Inventors:

- Grand Cayman, KY
Tao Chu - Portland OR, US
Man Gu - Malta NY, US

International Classification:

H01L 21/8234
H01L 29/66
H01L 29/78
H01L 29/06
H01L 29/10

Abstract:

One illustrative method disclosed herein includes forming at least one fin, forming a first recessed layer of insulating material adjacent the at least one fin and forming epi semiconductor material on the at least one fin. In this example, the method also includes forming a second recessed layer of insulating material above the first recessed layer of insulating material, wherein at least a portion of the epi semiconductor material is positioned above a level of the upper surface of the second recessed layer of insulating material, and forming a source/drain contact structure above the second recessed layer of insulating material, wherein the source/drain contact structure is conductively coupled to the epi semiconductor material.

US Patent:

20200411689, Dec 31, 2020

Filed:

Jun 30, 2019

Appl. No.:

16/458178

Inventors:

- GRAND CAYMAN, KY
DANIEL JAEGER - Saratoga Springs NY, US
MAN GU - Malta NY, US
BRADLEY MORGENFELD - Greenfield Center NY, US
HAITING WANG - Clifton Park NY, US
KAVYA SREE DUGGIMPUDI - Clifton Park NY, US
WANG ZHENG - Ballston Lake NY, US

International Classification:

H01L 29/78
H01L 29/66
H01L 21/822

Abstract:

A semiconductor device is provided, which includes an array of active regions, gate stacks and substantially uniform epitaxial structures. The gate stacks of the array include a first gate stack and a second gate stack over an active region. An active pillar between the first gate stack and the second gate stack, and the active pillar separating two substantially uniform epitaxial structures. A contact structure over the active pillar, positioned equidistant from the first gate stack and the second gate stack.

US Patent:

20200287019, Sep 10, 2020

Filed:

Mar 8, 2019

Appl. No.:

16/296769

Inventors:

- Grand Cayman, KY
Hong Yu - Clifton Park NY, US
Man Gu - Malta NY, US
Jianwei Peng - Clifton Park NY, US
Michael Aquilino - Gansevoort NY, US

International Classification:

H01L 29/66
H01L 29/78

Abstract:

Structures for a field-effect transistor and methods of forming a field-effect transistor. A gate structure of the field-effect transistor is arranged over an active region comprised of a semiconductor material. A first sidewall spacer is arranged adjacent to the gate structure. A second sidewall spacer includes a section arranged between the first sidewall spacer and the active region. The first sidewall spacer is composed of a low-k dielectric material.