Loren B Reiss

US Patent:

6477609, Nov 5, 2002

Filed:

Jan 31, 2000

Appl. No.:

09/495043

Inventors:

Loren B. Reiss - Raleigh NC
Bonnie C. Sexton - Cary NC
D. Adam Shiel - Eau Claire WI

Assignee:

Koninklijke Philips Electronics N.V. - Eindhoven

International Classification:

G06F 1300

US Classification:

710306, 710100, 710107, 710313, 710260

Abstract:

An expansion module for a Handspring Visor (which conforms to the Springboard bus specification) includes a multi-master AMBA Advanced System Bus (ASB). Optionally, an Arm7 processor is attached to this bus via an Arm7 to ASB interface as one master. The Springboard bus of the visor is coupled to the ASB bus via a Springboard-to-ASB-bus bridge. This bridge comprises a protocol translator and a second Arm7 to ASB interface. The protocol translator translates bi-directionally between the Springboard bus protocol and the Arm7TDMI protocol. The translator includes an interface to the Springboard bus and a state machine. The state machine coordinates data transfers between the buses. The state machine also monitors signals indicating when each of said buses begins to treat a data transfer as complete so that the data transfer can be validated or flagged as an error condition. A programmable counter adjusts maximum counts to compensate for different clock frequencies in measuring a write-wait state duration to ensure valid writes from the Visor to the ASB bus. Using this basic design framework, a developer of Springboard expansion modules can take immediate advantage of the performance and the variety of peripherals available for the ASB bus.

US Patent:

6571308, May 27, 2003

Filed:

Jan 31, 2000

Appl. No.:

09/495041

Inventors:

Loren B. Reiss - Raleigh NC
Bonnie C. Sexton - Cary NC
D. Adam Shiel - Eau Claire WI

Assignee:

Koninklijke Philips Electronics N.V. - Eindhoven

International Classification:

G06F 1336

US Classification:

710315, 710303

Abstract:

An expansion module for a Handspring Visor (which conforms to the Springboard bus specification) includes a multi-master AMBA Advanced System Bus (ASB). Optionally, an Arm7 processor is attached to this bus via an Arm7 to ASB interface as one master. The Springboard bus of the visor is coupled to the ASB bus via a Springboard-to-ASB-bus bridge. This bridge comprises a protocol translator and a second Arm7 to ASB interface. The protocol translator translates bi-directionally between the Springboard bus protocol and the Arm7TDMI protocol. The translator includes an interface to the Springboard bus and a state machine. The state machine coordinates data transfers between the buses. The state machine also monitors signals indicating when each of said buses begins to treat a data transfer as complete so that the data transfer can be validated or flagged as an error condition. A programmable counter adjusts maximum counts to compensate for different clock frequencies, in measuring a write-wait state duration to ensure valid writes from the Visor to the ASB bus. Using this basic design framework, a developer of Springboard expansion modules can take immediate advantage of the performance and the variety of peripherals available for the ASB bus.

US Patent:

6658508, Dec 2, 2003

Filed:

Jan 31, 2000

Appl. No.:

09/495044

Inventors:

Loren B. Reiss - Raleigh NC
Bonnie C. Sexton - Cary NC
D. Adam Shiel - Eau Claire WI
R. Christopher Noonan - Raleigh NC

Assignee:

Koninklijke Philips Electronics N.V. - Eindhoven

International Classification:

G06F 1300

US Classification:

710100, 710 68, 710 72, 710300, 710303, 710304, 710305, 710306

Abstract:

An expansion module for a Handspring Visor includes a multi-master AMBA Advanced System Bus (ASB). The Springboard bus of the visor is coupled to the ASB bus via Springboard-to-ASB-bus bridge. This bridge includes a protocol translator and a second Arm7 to ASB interface. The protocol translator translates bi-directionally between the Springboard bus protocol and the Arm7TDMI protocol. The translator includes an interface to the Springboard bus and a state machine. The state machine coordinates data transfers between the buses. The state machine also monitors signals indicating when each of the buses begins to treat a data transfer as complete so that the data transfer can be validated or flagged as an error condition. A programmable counter adjusts maximum counts to compensate for different clock frequencies in measuring a write-wait state duration to ensure valid writes from the Visor to the ASB bus.

US Patent:

6775763, Aug 10, 2004

Filed:

Mar 9, 2001

Appl. No.:

09/802594

Inventors:

Bonnie C. Sexton - Cary NC
Loren B. Reiss - Raleigh NC

Assignee:

Koninklijke Philips Electronics N.V. - Eindhoven

International Classification:

G06F 9455

US Classification:

712227, 703 26

Abstract:

A circuit arrangement and method facilitate the execution of switch instructions such as Java lookupswitch and tableswitch instructions in hardware through emulation of such instructions using a plurality of conditional branch instructions from the same instruction set as the switch instructions, and which are capable of being directly implemented in hardware. The conditional branch instructions are typically generated by switch instruction handling logic and passed to execution logic capable of natively executing the conditional branch instructions. By emulating a complex switch instruction in switch instruction handling logic using a plurality of conditional branch instructions from the same instruction set, often the amount of custom circuitry needed to fully support a complex switch instruction is substantially reduced from what would be required to natively support the switch instruction in the execution logic of a hardware processor. Moreover, compared to software emulation, which typically requires passing control to a software interpreter, the overhead associated with emulating a switch instruction in the instruction fetch logic using multiple conditional branch instructions capable of being natively executed by execution logic offers substantial gains in performance.

US Patent:

6944164, Sep 13, 2005

Filed:

Oct 31, 2003

Appl. No.:

10/698248

Inventors:

Dennis Albert Doidge - Apex NC, US
Jim P. Ervin - Raleigh NC, US
Douglas Ray Henderson - Raleigh NC, US
Edward Hau-chun Ku - Cary NC, US
Pramod Narottambhai Patel - Cary NC, US
Loren Blair Reiss - Raleigh NC, US
Thomas Eric Ryle - Raleigh NC, US
Joseph M. Rash - Wake Forest NC, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L012/28
H04J003/34

US Classification:

37039553, 370474

Abstract:

A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.

US Patent:

6970468, Nov 29, 2005

Filed:

Oct 31, 2003

Appl. No.:

10/698684

Inventors:

Dennis Albert Doidge - Apex NC, US
Jim P. Ervin - Raleigh NC, US
Douglas Ray Henderson - Raleigh NC, US
Edward Hau-chun Ku - Cary NC, US
Pramod Narottambhai Patel - Cary NC, US
Loren Blair Reiss - Raleigh NC, US
Thomas Eric Ryle - Raleigh NC, US
Joseph M. Rash - Wake Forest NC, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L012/28
H04J003/16

US Classification:

3703951, 370412, 370466

Abstract:

A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.

US Patent:

7403532, Jul 22, 2008

Filed:

Dec 22, 2004

Appl. No.:

11/020461

Inventors:

Dennis Albert Doidge - Apex NC, US
Jim P. Ervin - Raleigh NC, US
Douglas Ray Henderson - Raleigh NC, US
Edward Hau-chun Ku - Cary NC, US
Pramod Narottambhai Patel - Cary NC, US
Loren Blair Reiss - Raleigh NC, US
Thomas Eric Ryle - Raleigh NC, US
Joseph M. Rash - Wake Forest NC, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L 12/56

US Classification:

37039553, 370474, 370466

Abstract:

A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.

US Patent:

20040090967, May 13, 2004

Filed:

Oct 31, 2003

Appl. No.:

10/698287

Inventors:

Dennis Doidge - Apex NC, US
Jim Ervin - Raleigh NC, US
Douglas Henderson - Raleigh NC, US
Edward Ku - Cary NC, US
Pramond Patel - Cary NC, US
Loren Reiss - Raleigh NC, US
Thomas Ryle - Raleigh NC, US
Joseph Rash - Wake Forest NC, US

International Classification:

H04L012/28

US Classification:

370/395530, 370/474000

Abstract:

A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.