Lloyd I Dickman

US Patent:

7764676, Jul 27, 2010

Filed:

Jul 31, 2006

Appl. No.:

11/461387

Inventors:

Lloyd I. Dickman - Cupertino CA, US
Ian G. Colloff - Los Gatos CA, US

Assignee:

QLOGIC, Corporation - Aliso Viejo CA

International Classification:

H04L 12/56

US Classification:

370389, 370474, 709212, 710 26

Abstract:

Method and system for processing packets received from a network is provided. The system includes an adapter having a processing module that separates a header of a network packet from data, forwards the header to a host system and stores data associated with the network packet in a memory device of the network adapter. The host system processes the header and determines a destination for the network packet data. The method includes determining header boundary in a network packet, wherein an adapter coupled to a host system determines the header boundary; ending header information to the host system; and storing data associated with the network packet in a memory device of the adapter.

US Patent:

7936753, May 3, 2011

Filed:

Nov 30, 2007

Appl. No.:

11/948897

Inventors:

Ian G. Colloff - Los Gatos CA, US
Lloyd Dickman - Cupertino CA, US
Thomas R. Prohofsky - Edina MN, US
James A. Kunz - Plymouth MN, US

Assignee:

QLOGIC, Corporation - Aliso Viejo CA

International Classification:

H04L 12/28
H04L 12/56

US Classification:

370390

Abstract:

Method and system for transmitting a multicast message with one or more packets to a plurality of destinations is provided. The system includes an adapter including an entry port to receive the multicast message from a source for transmission to the plurality of destinations; one or more egress ports of the adapter that transmit one or more packets of the multicast message to the plurality of destinations and receives acknowledgement for the one or more packets from the one or more destinations; and a message manager that monitors the delivery status for one or more packets to the plurality of destinations without using a plurality of dedicated individual connections between each of the plurality of destinations and the source.

US Patent:

8477779, Jul 2, 2013

Filed:

Apr 11, 2011

Appl. No.:

13/084421

Inventors:

Ian G. Colloff - Los Gatos CA, US
Lloyd Dickman - Cupertino CA, US
Thomas R. Prohofsky - Edina MN, US
James A. Kunz - Plymouth MN, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H04L 12/28
H04L 12/56

US Classification:

370390, 370392

Abstract:

Method and system for transmitting a multicast message with one or more packets to a plurality of destinations is provided. The system includes an adapter including an entry port to receive the multicast message from a source for transmission to the plurality of destinations; one or more egress ports of the adapter that transmit one or more packets of the multicast message to the plurality of destinations and receives acknowledgement for the one or more packets from the one or more destinations; and a message manager that monitors the delivery status for one or more packets to the plurality of destinations without using a plurality of dedicated individual connections between each of the plurality of destinations and the source.

US Patent:

20130266009, Oct 10, 2013

Filed:

May 31, 2013

Appl. No.:

13/907424

Inventors:

Ian G. Colloff - Los Gatos CA, US
Lloyd Dickman - Cupertino CA, US
James A. Kunz - Plymouth MN, US

International Classification:

H04L 12/56

US Classification:

370390

Abstract:

Method and system for transmitting a multicast message with one or more packets to a plurality of destinations is provided. The system includes an adapter including an entry port to receive the multicast message from a source for transmission to the plurality of destinations; one or more egress ports of the adapter that transmit one or more packets of the multicast message to the plurality of destinations and receives acknowledgement for the one or more packets from the one or more destinations; and a message manager that monitors the delivery status for one or more packets to the plurality of destinations without using a plurality of dedicated individual connections between each of the plurality of destinations and the source.

US Patent:

45569517, Dec 3, 1985

Filed:

Jan 5, 1984

Appl. No.:

6/540510

Inventors:

Lloyd I. Dickman - Sudbury MA
William D. Strecker - Harvard MA

Assignee:

Digital Equipment Corporation - Maynard MA

International Classification:

G06F 734

US Classification:

364900

Abstract:

A central processor for use in a data processing system that is adapted for processing sequences of characters. Information identifying a string of characters to be examined, including the memory location for the first character in the sequence and the total number of characters in the sequence, is placed in working registers of the central processor. Other working registers in the central processor receive information corresponding to a predetermined characteristic, which may be a specific character or information identifying another character string. One of several character string instructions then can be processed. In response to a typical character string instructuion, the central processor retrieves each character from the memory and compares it with the predetermined characteristic. Processing continues until either the predetermined characteristic is detected or all the characters in the character string are examined. During processing, the central processor controls an arithmetic-logic condition code during each comparison.

US Patent:

45049033, Mar 12, 1985

Filed:

Jun 7, 1982

Appl. No.:

6/385976

Inventors:

Lloyd I. Dickman - Sudbury MA

Assignee:

Digital Equipment Corporation - Maynard MA

International Classification:

G06F 930

US Classification:

364200

Abstract:

A central processor for use in a data processing system that is adapted for processing sequences of characters. Information identifying a string of characters to be examined, including an initial memory location of the first character in the sequence and the total number of characters in the sequence, is placed in working registers of the central processor. Other working registers in the central processor receive information corresponding to a predetermined characteristic, which may be a specific character or information identifying another character string. One of several character string instructions then can be processed. In response to a typical character string instruction, the central processor performs the function defined by the instruction in an iterative fashion as the central processor retrieves successive characters from a memory. During each iteration the central processor tests to determine whether any interruption conditions exist. If one does, the central processor suspends further operations in response to the instruction and services the interruption.