Le C Nguyen

US Patent:

8121042, Feb 21, 2012

Filed:

Jun 29, 2009

Appl. No.:

12/493665

Inventors:

Dazhi Wang - San Jose CA, US
Kishor S. Trivedi - Durham NC, US
Tilak C. Sharma - Tacoma WA, US
Anapathur V. Ramesh - Bothell WA, US
David William Twigg - Federal Way WA, US
Le P. Nguyen - Renton WA, US
Yun Liu - Lynnwood WA, US

Assignee:

The Boeing Company - Chicago IL

International Classification:

H04J 1/16

US Classification:

370248, 370252

Abstract:

A computer-based method for determining a probability that no path exists from a specified starting node to a specified target node within a network of nodes and directional links between pairs of nodes is described. The nodes and directional links form paths of a reliability graph and the method is performed using a computer coupled to a database that includes data relating to the nodes and the directional links The method includes selecting a set of paths, from the set of all paths, between the starting node and the target node that have been determined to be reliable, calculating a reliability of the union of the selected path sets, setting an upper bound for the unreliability of the set of all paths, based on the calculated reliability, selecting a set of minimal cutsets from all such cutsets that lie between the starting node and the target node, calculating the probability of the union of the minimal cutsets, and setting a lower bound for the unreliability of the set of all cutsets.

US Patent:

20130126620, May 23, 2013

Filed:

Sep 14, 2012

Appl. No.:

13/618378

Inventors:

Jeannine Dussi - Arlington MA, US
Edward Ganshirt - Lexington MA, US
Ray Goodwin - Shrewsbury MA, US
Stan Liffmann - Newbury MA, US
Tony Mao - Natick MA, US
Doug Moe - Manchester NH, US
Steve Rettew - Harvard MA, US
Ian Smith - Scottsdale AZ, US
Charlene Soley - Westford MA, US
Le Nguyen - Dorchester MA, US
Qian Sun - Westford MA, US
Will Whelan - Arlington MA, US
Diana Zipeto - Lowell MA, US
Gregory Sweetser - Nashua NH, US

International Classification:

G06K 19/07

US Classification:

235492

Abstract:

Disclosed in one general aspect is a modular chemistry analysis test unit for a chemistry analyzer that includes one or more vessels for one or more reagents. A machine-readable test specification is coupled with the vessels and identifies a series of test operations that employ the reagents for the vessels. The specification includes one or more reagent quantity specifications that specify a quantity of the reagents to mix with a test sample, and one or more reaction duration specifications that specify a reaction time for the reagents and test sample.

US Patent:

20130130390, May 23, 2013

Filed:

Sep 14, 2012

Appl. No.:

13/618335

Inventors:

Jeannine Dussi - Arlington MA, US
Edward Ganshirt - Lexington MA, US
Ray Goodwin - Shrewsbury MA, US
Stan Liffmann - Newbury MA, US
Tony Mao - Natick MA, US
Doug Moe - Manchester NH, US
Steve Rettew - Harvard MA, US
Ian Smith - Scottsdale AZ, US
Charlene Soley - Westford MA, US
Le Nguyen - Dorchester MA, US
Qian Sun - Westford MA, US
Will Whelan - Arlington MA, US
Diana Zipeto - Lowell MA, US
Gregory Sweetser - Lowell MA, US

International Classification:

G01N 35/00

US Classification:

436 48

Abstract:

An automated chemistry analysis method is disclosed. In one general aspect, the method includes receiving a modular chemistry analysis test unit that includes one or more vessels for one or more reagents, and a machine-readable test specification coupled with the vessels. The method also includes defining a test that defines a test including a series of operations that employ the reagents for the vessels, and installing the chemistry analysis test unit in a first chemistry analyzer that includes one or more analysis tools and sequencing logic for sequencing instructions to be carried out by the analysis tools. The machine-readable test specification is automatically received from the chemistry analysis test module and stored for access by the sequencing logic to allow the sequencing logic to instruct the analysis tools to carry out the test defined by the test specification.

US Patent:

20130132882, May 23, 2013

Filed:

Sep 14, 2012

Appl. No.:

13/618429

Inventors:

Jeannine Dussi - Arlington MA, US
Ray Goodwin - Shrewsbury MA, US
Stan Liffmann - Newbury MA, US
Tony Mao - Natick MA, US
Doug Moe - Manchester NH, US
Steve Rettew - Harvard MA, US
Ian Smith - Scottsdale AZ, US
Charlene Soley - Westford MA, US
Le Nguyen - Dorchester MA, US
Qian Sun - Westford MA, US
Will Whelan - Arlington MA, US
Diana Zipeto - Lowell MA, US
Gregory Sweetser - Nashua NH, US

International Classification:

G06F 3/0481

US Classification:

715772

Abstract:

Disclosed in one general aspect is a method of operating a chemistry analyzer method that includes determining usage levels associated with a plurality of storage vessels that store reagents for use by the analyzer. A pictorial representation that includes a plurality of graphical elements that convey levels of usage for the storage vessels is displayed to the operator. A series of access icons that are each associated with a color and each lead to a set of screens for different types of operations for the analyzer are also displayed, with the screens being color coded to correspond to the color associated with their respective access icons.

US Patent:

49823604, Jan 1, 1991

Filed:

Sep 22, 1983

Appl. No.:

6/534927

Inventors:

William N. Johnson - Sudbury MA
Le T. Nguyen - Hudson MA
Richard L. Sites - Boylston MA
Stanley A. Lackey - Littleton MA

Assignee:

Digital Equipment Corporation

International Classification:

G06F 1210

US Classification:

364900

Abstract:

A memory subsystem including a read-only memory (ROM), a random access read/write memory (RAM) and a selection system for selecting the output of one of the memories for use by downstream circuitry. The selection of the output is based on input address signals so that the contents of the RAM can substitute for the contents of selected locations in the ROM. If a substitution is to be made, an entry is made in a content addressable memory, which stores addresses for which the RAM output is to be substituted for ROM output. A test system is provided to verify the contents of the content addressable memory.

Address:

15538 Meridian Ave N, Shoreline, WA 98133

VIN:

WVWDB71K98W290722

Make:

VOLKSWAGEN

Model:

RABBIT

Year:

2008