Kit Y Siu

US Patent:

20110146232, Jun 23, 2011

Filed:

Dec 23, 2009

Appl. No.:

12/645480

Inventors:

Eric Richard Westervelt - Niskayuna NY, US
Douglas Carl Hofer - Clifton Park NY, US
Narendra Digamber Joshi - Schenectady NY, US
Kit Yan Siu - Rhinebeck NY, US
Ruijie Shi - Clifton Park NY, US
Adam Rasheed - Glenville NY, US
Venkat Eswarlu Tangirala - Niskayuna NY, US

Assignee:

GENERAL ELECTRIC COMPANY - SCHENECTADY NY

International Classification:

F02K 5/02

US Classification:

60247

Abstract:

A pulse detonation turbine engine (PDTE) includes at least one controllable multi-tube pulse detonation combustor (PDC) configured to initiate firing of one or more pulse detonation tubes in response to operation of a plurality of controllable peripheral PDC components to regulate PDTE output characteristics. A control system including a programmable controller directed by algorithmic software operates to generate control inputs for the plurality of controllable peripheral PDC components in response to PDTE input conditions, such that one or more PD tube controllable inputs can be different for at least one PD tube relative to another PD tube within the multi-tube PDC, and further such that detonation timing can be different for at least one PD tube relative to another PD tube within the multi-tube PDC.

US Patent:

20180246703, Aug 30, 2018

Filed:

Feb 24, 2017

Appl. No.:

15/441626

Inventors:

- Schenectady NY, US
Han YU - Niskayuna NY, US
Gregory Reed SYKES - Grand Rapids MI, US
Michael Richard DURLING - Gansevoort NY, US
Kit Yan SIU - Niskayuna NY, US
Scott Alan STACEY - Dayton OH, US

International Classification:

G06F 9/44
G06F 9/455

Abstract:

According to some embodiments, an Arbitrary Software Logic Modeling (“ASLM”) data source may store electronic records associated with units, each electronic record including a unit identifier, one or more identification tags, context data, unit parameters, unit variables, and internal logic. An ASLM platform may express system requirements at a logic block level and establish the logic blocks as self-contained entities and connections in accordance with the system requirements (the established logic blocks graphically representing systems logic). The ASLM platform may then explicitly transform the systems logic automatically to output language agnostic common design information exchange model information. The ASLM platform may also translate and maintain traceability among the system requirements, common design information exchange model information, and generated code.

US Patent:

20180196739, Jul 12, 2018

Filed:

Mar 9, 2018

Appl. No.:

15/916660

Inventors:

- Schenectady NY, US
Michael Richard DURLING - Gansevoort NY, US
Kit Yan SIU - Niskayuna NY, US
Italo OLIVEIRA - Rio de Janeiro, BR
Han YU - Niskayuna NY, US
Augusto Marasca DE CONTO - Rio de Janeiro, BR

International Classification:

G06F 11/36
G06F 8/20
G06F 8/35

Abstract:

Automated requirements-based test case generation method includes constructing a software architecture model derived from software design model architectural information, allocating requirement models into blocks/operators of the software architecture model, and generating component-level requirements-based test cases from the software architecture configured to be executable at different levels in the software architecture. The component-level requirements-based test case generation method includes receiving a software architecture along with allocated requirement models represented in hierarchical data flow diagram, selecting one of the software components, building an intermediate test model based on the selected component by automatically attaching at least one of test objectives or constraints to the corresponding software architecture model blocks/operators based on the selected test strategy, and generating human and machine readable test cases with the test generator for further automatic conversion to test executable and test review artifacts. A system and a non-transitory computer-readable medium for implementing the method are also disclosed.

US Patent:

20170147482, May 25, 2017

Filed:

Nov 20, 2015

Appl. No.:

14/947633

Inventors:

- Schenectady NY, US
Michael Richard DURLING - Niskayuna NY, US
Kit Yan SIU - Niskayuna NY, US
Italo OLIVEIRA - Rio de Janeiro, BR
Han YU - Niskayuna NY, US
Augusto Marasca De CONTO - Rio de Janeiro, BR

International Classification:

G06F 11/36
G06F 9/44

Abstract:

Automated requirements-based test case generation method includes constructing in a model-based development tool a software architecture model automatically derived from architectural information of a software design model, allocating requirement models into blocks/operators of the software architecture model, and generating component level requirements-based test cases from the software architecture. The component level requirements-based test case generation method includes receiving a software architecture along with allocated requirement models represented in hierarchical data flow diagram, selecting one of the software components, building an intermediate test model based on the selected component by automatically attaching at least one of test objectives or constraints to the corresponding software architecture model blocks/operators based on the selected test strategy, and generating human and machine readable test cases with the test generator for further automatic conversion to test executable and test review artifacts. A system and a non-transitory computer-readable medium for implementing the method are also disclosed.