Apparatus, for preventing false recognition of one or more address marks arranged at predetermined locations in a stream of information-bearing bits played back from a record storage medium, such as a disk, includes a timer, synchronized with the bit stream, for defining a corresponding series of intervals or "windows" relating, respectively, to when each of the address marks is expected to occur in the bit stream. An decoder, responsive to the timer, signals which address mark is expected to occur during each interval defined by the timer. Validation circuitry, responsive to the bit stream, the timer and the decoder, determines whether each address mark expected actually occurs in the bit stream within the corresponding time interval defined by the timer.
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