Joseph R Eykholt

US Patent:

7522627, Apr 21, 2009

Filed:

Sep 13, 2002

Appl. No.:

10/244146

Inventors:

Vincent Lam - Mountain View CA, US
Adrian Caceres - Los Gatos CA, US
Joseph R. Eykholt - Los Altos CA, US
Lawrence Huston - Wexford PA, US

Assignee:

Nokia Corporation - Espoo

International Classification:

H04L 12/28
H04L 12/56
H04L 12/54

US Classification:

370427, 370428

Abstract:

The present invention provides a system and method for packet forwarding. The packet forwarding improves the performance of common network security applications. The system includes an operating system kernel, a plurality of packet forwarding paths, and a packet classifier. The method includes receiving network packets, receiving state information from a plurality of external agents, selecting a forwarding path from a plurality of forwarding paths based on the state information, and transmitting packets.

US Patent:

20050273571, Dec 8, 2005

Filed:

Sep 23, 2004

Appl. No.:

10/948064

Inventors:

Thomas Lyon - Palo Alto CA, US
Peter Newman - Mountain View CA, US
Joseph Eykholt - Los Altos CA, US

International Classification:

G06F012/08

US Classification:

711203000

Abstract:

A distributed virtual multiprocessor having a plurality of nodes coupled to one another by a network. A first node of the distributed virtual multiprocessor page faults in response to an instruction that indicates a memory reference at a virtual address. The first node indexes a first address translation data structure maintained therein to obtain an intermediate address that corresponds to the virtual address, then transmits the intermediate address to a second node of the distributed virtual multiprocessor to request a copy of a memory page that corresponds to the intermediate address. The first node receives a copy of the memory page that corresponds to the intermediate address from the second node, stores the copy of the memory page at a physical address, then loads a second address translation data structure with translation information that indicates a translation of the virtual address to the physical address. Thereafter, the first node resumes execution of the instruction that yielded the page fault, completes an instructed memory access by indexing the second address translation data structure with the virtual address to obtain the physical address, then accessing memory at the physical address.

US Patent:

62600575, Jul 10, 2001

Filed:

Mar 1, 1995

Appl. No.:

8/396600

Inventors:

Joseph R. Eykholt - Los Altos CA
Steven R. Kleiman - Los Altos CA

Assignee:

Sun Microsystems, Inc. - Mountain View CA

International Classification:

G06F 940

US Classification:

709102

Abstract:

A method and apparatus for bypassing multiple pre-tests and post-tests during a system call when those tests are known to be inapplicable. One or more slow path flags are checked during a system call or TRAP. If the slow path flag is clear, execution follows a fast instruction path, resulting in faster execution for the system call or TRAP. Otherwise execution follows a slow instruction path. The slow path flags are set, cleared, and checked at appropriate times. The invention improves the execution time of a thread in a software process and may be used in a data processing system employing multiple threads. Each thread in the data processing system has its own set of slow path flags. The invention can set, clear and check the slow path flags of each thread independently, in subsets of threads, or in all threads.

US Patent:

62533177, Jun 26, 2001

Filed:

Jan 9, 1997

Appl. No.:

8/780777

Inventors:

Henry H. Knapp - Castle Rock CO
Joseph R. Eykholt - Los Altos CA
Roger A. Faulkner - Mountain View CA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

G06F 900

US Classification:

712244

Abstract:

A computer program or a computer process is provided by replacing a native computer instruction with a trapping computer instruction which is the size of the native computer instruction and which, when executed, causes a trap to the kernel. A trap handler in the kernel determines that the inserted trapping computer instruction caused the trap and transfers control to a user trap handler. The user trap handler maps the trap site to a patch of computer instructions. When the trapping computer instruction is executed, the trap handler transfers control from the kernel to the user trap handler which in turn transfers control to the patch. Native computer instructions in sufficient proximity to corresponding patches of computer instructions may be replaced with branching computer instructions of the size of the native computer instruction and which transfer control to those corresponding patches. Other native computer instructions are replaced with trapping computer instructions which transfer control to corresponding patches through traps to the kernel. Unanticipated traps may be handled by mapping all trap sites other than those corresponding to inserted trapping computer instructions to a default patch which processes unanticipated traps.

US Patent:

20190155896, May 23, 2019

Filed:

Jan 23, 2019

Appl. No.:

16/255592

Inventors:

- Santa Clara CA, US
Joseph R. Eykholt - Santa Clara CA, US
Sudha Sundaresan - Saratoga CA, US
Pablo Sebastián Rivera - Ciudad de Buenos Aires, AR
David Russell Friedman - Menlo Park CA, US
Adrian Caceres - Los Gatos CA, US

International Classification:

G06F 17/27
G06F 11/07
G06F 9/54

Abstract:

In an embodiment, a processing device receives an instruction to schedule an event associated with a remote target device, generates a schedule for the remote target device, and transmits the schedule to the remote target device. The processing device receives usage information from the remote target device and additional usage information from other remote devices. The processing device applies a machine learning algorithm to the usage information and the additional usage information to determine an update to the schedule. The processing device updates the schedule and sends the update to the remote target device.

US Patent:

20190095194, Mar 28, 2019

Filed:

Nov 28, 2018

Appl. No.:

16/203438

Inventors:

- Santa Clara CA, US
Peter Hunt - Sunnyvale CA, US
Sudha Sundaresan - Saratoga CA, US
Daniel Myers - Fremont CA, US
Joseph R. Eykholt - Santa Clara CA, US
Adrian Caceres - Los Gatos CA, US

International Classification:

G06F 8/65
H04W 88/08
G06F 8/654
H04L 29/06
H04L 29/08
H04W 12/02
H04W 12/04
H04W 84/12
H04W 12/10

Abstract:

A processing device executing a wide area network (WAN) accessible service receive an encrypted digital image comprising a firmware update for an embedded system of a device having a specific device serial number (DSN). The processing device additionally receives device related information from a computing device, wherein the device related information comprises the DSN of the device comprising the embedded system and a version number of a current firmware component installed on the embedded system. The processing device determines, using the device related information, that the encrypted digital image for the device is available. The processing device then provides the encrypted digital image to the computing device for use by the computing device to update a firmware version of the embedded system.

US Patent:

20190044926, Feb 7, 2019

Filed:

Oct 5, 2018

Appl. No.:

16/153609

Inventors:

- Santa Clara CA, US
Marko Kiiskila - Sunnyvale CA, US
Daniel Myers - Fremont CA, US
Joseph R. Eykholt - Santa Clara CA, US
Adrian Caceres - Los Gatos CA, US

International Classification:

H04L 29/06
H04L 9/08

Abstract:

A hardware module for an embedded system comprises a network adapter, a memory and a processing device. The memory stores a shared key and a key identifier (ID) associated with the shared key. The processing device is to connect to a local area network (LAN) using the network adapter. The processing device is further to receive a first notification from a computing device that is also connected to the LAN and determine whether the computing device has access to a copy of the shared key based on the key identifier (ID). Responsive to determining that the computing device has access to the copy of the shared key, the processing device is to use the shared key to generate a session key for a session with the computing device. The processing device may then encrypt communications to the computing device using the session key.

US Patent:

20170249135, Aug 31, 2017

Filed:

Feb 26, 2016

Appl. No.:

15/055409

Inventors:

- Sunnyvale CA, US
Peter F. Hunt - Sunnyvale CA, US
Daniel J. Myers - Fremont CA, US
Joseph R. Eykholt - Los Altos CA, US
Adrian Caceres - Los Gatos CA, US
Sudha Sundaresan - San Jose CA, US

International Classification:

G06F 9/445
H04L 29/06
H04W 12/04
H04L 29/08

Abstract:

A computing device determines a unique identifier associated with a device comprising an embedded system. The computing device sends the unique identifier to a wide area network (WAN) accessible service and receives an encrypted digital image comprising a firmware update for the device comprising the embedded system from the WAN accessible service. The computing device stores the encrypted digital image in a storage area of the computing device and initiates an over the air update of firmware of the device comprising the embedded system using the encrypted digital image.