Leon Lumelsky - Stamford CT Sung Min Choi - White Plains NY Alan Wesley Peevers - Berkeley CA John Louis Pittas - Bethel CT
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G09G 536
US Classification:
345509
Abstract:
An image display system (10) includes an image buffer (20,22) having a plurality of addressable locations for storing image pixel data. The system further includes circuitry (24,34,36) coupled to an output of the image buffer for converting image pixel data read therefrom to electrical signals for driving an image display (18). The circuitry is responsive to signals generated by an image display controller (16) for generating one of a plurality of different timing formats for the electrical signals for driving an image display having a specified display resolution. The apparatus further includes circuitry (40,42) for configuring the image buffer in accordance with the specified display resolution. The image buffer is configurable, by example, as two, 2048 location by 1024 location by 24-bit buffers and one 2048 location by 1024 location by 16-bit buffer; or as two, 2048 location by 2048 location by 24-bit buffers and one 2048 location by 2048 location by 16-bit buffer. Each of the 24-bit buffers store R,G,B pixel data and the 16-bit buffers each store a color index (CI) value and an associated window identifier (WID) value.
Frame Buffer Organization And Control For Real-Time Image Decompression
Sung M. Choi - White Plains NY Leon Lumelsky - Stamford CT Alan W. Peevers - Peekskill NY John L. Pittas - Bethel CT
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G09G 102
US Classification:
345186
Abstract:
A display system is described which includes storage for receiving a compressed pixel image manifesting at least a pair of encoded colors and a bit MASK that defines which pixels of a pixel subset of the pixel image receive one of the colors. The system comprises a plurality of memory modules. The pixels in the subset are interleaved in the memory modules. A generator is provided for applying signals to cause data to be written into each of modules in parallel. Register means are provided for applying data manifesting the encoded colors to the modules. Control apparatus is responsive to the MASK bits for controlling the generator to write the encoded color data, in parallel and in a single memory cycle, into all pixel positions of the subset that are designated for the color(s) by MASK bit position values.
Multi-Source Image Real Time Mixing And Anti-Aliasing
Leon Lumelsky - Stamford CT Sung M. Choi - White Plains NY Alan W. Peevers - Berkeley CA John L. Pittas - Bethel CT
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G09G 102 G09G 106
US Classification:
345191
Abstract:
Method and apparatus for implementing a raster graphic display video data path that provides arbitrary mixing of a plurality of images. The video data path is highly parallelized, and employs parallel devices operating under the control of a set of look-up tables. The look-up tables are loadable from a controller, such as a host workstation. The raster graphic display video data path functions with unlimited screen resolutions, and also enables a variety of different pixel data formats from a potentially large number of different sources. Outputs from several image sources are mixed under the control of the host workstation, with a resultant pixel value being based on (a) a combined translucency coefficient (alpha) of the images, for each image source, and (b) a window identification number assigned by the host workstation. Pixel value conversion to a common predetermined format provides coherency between pixel values generated by a number of different image sources, such as HDTV and graphics servers. A separate frame buffer is allocated for each of the sources.
Look-Up Table Based Gamma And Inverse Gamma Correction For High-Resolution Frame Buffers
Leon Lumelsky - Stamford CT Calvin B. Swart - Poughkeepsie NY John L. Pittas - Bethel CT Sung M. Choi - White Plains NY Alan W. Peevers - Berkeley CA
Assignee:
International Business Machines, Corporation - Armonk NY
International Classification:
H04N 5202
US Classification:
358 32
Abstract:
An image display system includes an input to a source (10, 12, 14) of image pixel data wherein each pixel is expressed as an M-bit value within a non-linear range of values. A first LUT (16) is coupled to an output of the source for converting each M-bit pixel value to an N-bit value within a linear range of values. An image memory, or frame buffer (18), has an input coupled to an output of the first LUT for storing the N-bit pixel values. The system further includes a second LUT (20) coupled to an output of the frame buffer for converting N-bit pixel values output by the frame buffer to P-bit pixel values within a non-linear range of values. The converted values are subsequently applied to a display (24). In an exemplary embodiment, the first LUT stores gamma corrected pixel values and the second LUT stores inverse gamma corrected pixel values. Preferably the second LUT stores a plurality of sets of inverse gamma corrected pixel values.
St. Demetrios of Astoria High School Astoria NY 1965-1969
Community:
Nicholas Aldi, Denise Rathjen, James Stavrinos, George Skaperdas, John Hatziantoniou, Joanna Kapsalis, Nabil Abdelhaq, Mary Laspakis, Maria Dourmas, Nick Hatziantoniou