Jai J Mishra

Validation Project Manager

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Location:

441 Catterline Way, Folsom, CA 95630

Industry:

Semiconductors

Work:

Intel Corporation
Validation Project Manager
Intel Corporation Oct 2008 - Oct 2016
Engineering Manager
Intel Corporation Jul 2004 - Sep 2008
Senior Program Manager
Intel Corporation Jun 1995 - Mar 2001
Senior Project Engineer

Education:

Arizona State University 1992 - 1995
Masters, Engineering, Electronics Engineering Delhi College of Engineering 1987 - 1991
Bachelor of Engineering, Bachelors, Electronics Engineering

Skills:

Semiconductors
Debugging
Asic
Soc
Verilog
Ic
Application Specific Integrated Circuits
Engineering Management
System on A Chip
Dft
Intel
Mixed Signal
Testing
Vlsi
Analog
Embedded Systems
Integrated Circuits
Semiconductor Industry
Very Large Scale Integration
Project Management
Product Engineering
Test Engineering
Electrical Engineering
Processors
Program Management
Cross Functional Team Leadership
Manufacturing
Leadership
Team Leadership
Organizational Leadership
Agile Methodologies
Scrum
Hardware Architecture
Validation
Circuit Design
Simulations
Management
Vendor Management
Product Development
Product Management
Operational Excellence
Silicon
Computer Architecture
Agile and Waterfall Methodologies
Perl
Microprocessors
Cmos
Rtl Design
Integrated Circuit Design

Interests:

Electronics

Languages:

English

Jai Prakash Mishra

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Jai Mishra

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Jai Shankar Mishra

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Jai Shankar Mishra

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Validation Manager At Intel

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Position:

Validation Manager at Intel

Location:

Sacramento, California Area

Industry:

Semiconductors

Work:

Education: