Ehsan M Najafabadi

US Patent:

20220358042, Nov 10, 2022

Filed:

Jul 9, 2021

Appl. No.:

17/372309

Inventors:

- Suwon-si, KR
Andrew Z. CHANG - Los Altos CA, US
Ehsan NAJAFABADI - Duluth GA, US

International Classification:

G06F 12/0817

Abstract:

A coherent memory system. In some embodiments, the coherent memory system includes a first memory device. The first memory device may include a cache coherent controller; a volatile memory controller; a volatile memory; a nonvolatile memory controller; and a nonvolatile memory. The first memory device may be configured to receive a quality of service requirement and to selectively enable a first feature in response to the quality of service requirement.

US Patent:

20200267053, Aug 20, 2020

Filed:

Feb 13, 2020

Appl. No.:

16/790582

Inventors:

- Suwon-si, KR
Ehsan Najafabadi - San Jose CA, US
Yasser Zaghloul - San Jose CA, US

International Classification:

H04L 12/24
G06N 3/04
H04L 12/26
H04L 12/833
H04L 29/08
G06F 9/455

Abstract:

Provided are systems, methods, and apparatuses for latency-aware edge computing to optimize network traffic. A method can include: determining network parameters associated with a network architecture, the network architecture comprising a data center and an edge data center; determining, using the network parameters, a first programmatically expected latency associated with the data center and a second programmatically expected latency associated with the edge data center; and determining, based at least in part on a difference between the first programmatically expected latency or the second programmatically expected latency, a distribution of a workload to be routed between the data center and the edge data center.