Edmundo Dela Puente

US Patent:

20030005375, Jan 2, 2003

Filed:

Jun 29, 2001

Appl. No.:

09/896474

Inventors:

Alan Krech - Fort Collins CO, US
Edmundo Puente - Cupertino CA, US
Joel Buck-Gengler - Longmont CO, US

International Classification:

G01R031/28

US Classification:

714/724000

Abstract:

A Test Station for a memory tester is comprised of one or more Test Sites that are each individually algorithmically controllable, that can each deal with as many as sixty-four channels, and that can be bonded together to form a Multi-Site Test Station of two or more Test Sites. Up to nine Test Sites can be bonded together as a single Multi-Site Test Station. Bonded Test Sites still operate at the highest speeds they were capable of when not bonded. To bring this about it is necessary to implement certain programming conventions and to provide certain housekeeping functions relating to simultaneous starting of separate test programs on the bonded Test Sites, and relating to propagation and synchronization of test program qualifier results among those separate test programs. There also is a suspend/resume test program execution mechanism that assists one test program in temporarily interrupting the others to allow time for a change within one or more of the Test Sites of a measurement parameter, such as a voltage comparison threshold.

US Patent:

20060270357, Nov 30, 2006

Filed:

May 27, 2005

Appl. No.:

11/140097

Inventors:

Edmundo Puente - Cupertino CA, US
Robert Pochowski - Sunnyvale CA, US

International Classification:

H04B 17/00

US Classification:

455067110

Abstract:

An active routing circuit. In representative embodiments, the active routing circuit includes a channel switch which includes a transceiver and a switch. The transceiver has first data line, second data line, drive/receive control line, and receiver select control line. The switch has first contact connected to first data line, second contact connected to second data line, and switch control line. In a driver mode, the transceiver can receive data from first data line and output that data to second data line, and in receiver mode, can receive data from second data line and output that data to first data line. The transceiver can switch between driver mode and receiver mode in response to a signal. Data received from the second data line can be blocked in response to another signal. The switch can shift between connecting and disconnecting first contact to/from second contact in response to yet another signal.

US Patent:

20070096757, May 3, 2007

Filed:

Oct 31, 2005

Appl. No.:

11/264577

Inventors:

Edmundo Puente - Cupertino CA, US
Alan Hart - San Carlos CA, US

International Classification:

G01R 31/02

US Classification:

324761000

Abstract:

In one embodiment, a resource matrix is provided with a first set of pins, a second set of pins, and at least one programmable switching circuit. The first set of pins electrically couples the resource matrix with a tester resource. The second set of pins electrically couples the resource matrix with a plurality of test areas. The at least one programmable switching circuit selectively couples each one of the first set of pins to different ones of the second set of pins. In one embodiment, the at least one programmable switching circuit includes a set of multiplexers. In another embodiment, the at least one programmable switching circuit includes a set of LIMMS. In another embodiment, a system is disclosed for testing a plurality of test areas with a tester resource and a resource matrix. Methods for routing signals between a tester resource and plurality of test areas are also disclosed.

US Patent:

20070198881, Aug 23, 2007

Filed:

Feb 17, 2006

Appl. No.:

11/357480

Inventors:

Erik Volkerink - San Jose CA, US
Edmundo Puente - Cupertino CA, US

International Classification:

G01R 31/28

US Classification:

714724000

Abstract:

A test system for performing tests on devices under test (DUTs) includes a storage device storing test data for performing the tests on the DUTs, a shared processor for generating the test data, storing the test data in the storage device and generating a test control signal including one or more test instructions for executing the tests, and, for each DUT, a dedicated processor configured to receive a test control signal from the shared processor, and in response to the test control signal, transfer the test data for one of the test instructions to the DUT to execute that test instruction and verify the completion of that test instruction.

US Patent:

20070247140, Oct 25, 2007

Filed:

Apr 24, 2006

Appl. No.:

11/410699

Inventors:

Romi Mayder - San Jose CA, US
Pam Stellmacher - Cupertino CA, US
Edmundo Puente - Cupertino CA, US
John Andberg - Santa Cruz CA, US

International Classification:

G01R 31/28

US Classification:

324158100

Abstract:

Apparatus is for processing signals between a tester and devices under test. In one embodiment, the apparatus includes at least one multichip module. Each multichip module has a plurality of micro-electromechanical switches between a set of connectors to the tester and a set of connectors to devices under test. At least one driver is provided to operate each of the micro-electromechanical switches. A method of processing signals between a tester and devices under test is disclosed. In an embodiment, the method includes connecting the tester and the devices under test with at least one multichip module. Each of the at least one multichip module has a plurality of micro-electromechanical switches between a set of connectors to the tester and a set of connectors to the devices under test. The method includes operating each of the micro-electromechanical switches. Other embodiments are also disclosed.

US Patent:

20110089966, Apr 21, 2011

Filed:

Dec 21, 2010

Appl. No.:

12/974950

Inventors:

Romi Mayder - San Jose CA, US
Pam Stellmacher - Cupertino CA, US
Edmundo Dela Puente - Cupertino CA, US
John Andberg - Santa Cruz CA, US

Assignee:

Verigy (Singapore) Pte. Ltd. - Singapore

International Classification:

G01R 31/00

US Classification:

32475603, 32475605

Abstract:

Apparatus is for processing signals between a tester and devices under test. In one embodiment, the apparatus includes at least one multichip module. Each multichip module has a plurality of micro-electromechanical switches between a set of connectors to the tester and a set of connectors to devices under test. At least one driver is provided to operate each of the micro-electromechanical switches. Other embodiments are also disclosed.