Keith C Griggs

US Patent:

6463392, Oct 8, 2002

Filed:

Aug 16, 1999

Appl. No.:

09/375307

Inventors:

Richard A. Nygaard - Colorado Springs CO
Edward G. Pumphrey - Colorado Springs CO
Keith C. Griggs - Colorado Springs CO

Assignee:

Agilent Technologies, Inc. - Palo Alto CA

International Classification:

G01D 1800

US Classification:

702 89, 73 142

Abstract:

A system and method are provided for detecting a stable region in a data signal to facilitate the alignment between a data signal and a corresponding clock signal. The system includes a processor coupled to a local interface and a memory coupled to the local interface. The system also includes a boundary detection circuit configured to perform a simultaneous sampling of a reference signal and a delayed reference signal to ascertain a degree of stability of a position in the reference signal. The reference signal is the signal received from the target system and the delayed reference signal is a delayed copy of the reference signal. The system also includes boundary detection logic stored on the memory and executed by the processor to control the operation of the boundary detection circuit. The boundary detection logic includes logic to detect a boundary of the stable region of the reference.

US Patent:

20130249637, Sep 26, 2013

Filed:

Mar 26, 2012

Appl. No.:

13/429626

Inventors:

Keith C. Griggs - Colorado Springs CO, US

Assignee:

AGILENT TECHNOLOGIES, INC. - Loveland CO

International Classification:

H03F 3/68

US Classification:

330295

Abstract:

An amplifier device having an extended bandwidth includes a DC coupled amplifier and multiple low noise amplifiers connected in series with one another and connected in parallel with at least a portion of the DC coupled amplifier. The DC coupled amplifier has a broad bandwidth, and each of the low noise amplifiers has a narrow bandwidth and a center frequency higher than a high end frequency of the broad bandwidth of the DC coupled amplifier. The extended bandwidth of the amplifier device is a combination of the broad bandwidth and the first narrow bandwidth.

US Patent:

56002785, Feb 4, 1997

Filed:

Feb 3, 1995

Appl. No.:

8/384295

Inventors:

Thomas F. Uhling - Monument CO
Keith C. Griggs - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

H03F 368
H03G 330

US Classification:

330 51

Abstract:

A first amplifier channel between an input and output includes an input transistor emitter and a first output transistor emitter connected together to form a first emitter pair. A current source is connected to the emitter pair via a transistor which is controlled by a latch. Programming the latch permits the channel to be turned on or off. The emitter pair is connected to a positive voltage through a resistor and to ground through a diode to force it to a controlled off voltage, which prevents signals from passing when the channel is off. There is a output driver amplifier in a feedback circuit. An outdisable circuit controls the voltage and current of the output driver amplifier to place the output in a state in which it appears electrically as an open circuit when the channel is off. Multiple programmable amplifiers can be combined to make a multiplexer, a selectable gain circuit, or a selectable attenuation circuit, all with high band width and high signal integrity.

US Patent:

56252994, Apr 29, 1997

Filed:

Feb 3, 1995

Appl. No.:

8/384296

Inventors:

Thomas F. Uhling - Monument CO
David J. Dascher - Colorado Springs CO
Keith C. Griggs - Colorado Springs CO

International Classification:

G01R 3102

US Classification:

324754

Abstract:

A probe head includes integrated circuit chip inputs, a ground plane on a circuit board, and hundreds of probe leads comprising traces on the circuit board connected between the inputs and a circuit under test. Each trace is about 3 mils wide. There is a DICLAD polytetrafluoroethylene dielectric material of dielectric constant of about 2. 2 between the ground and traces. Every other trace is electrically connected to the ground plane. Input resistors are buried in the circuit board and there is an on-chip input divider network. The customer defines the grounded pins of a circuit to be tested. Probe leads corresponding to the grounded pins are connected to the ground plane, maximizing the connections between the grounds of the probe and the circuit under test and minimizing unequal ground potentials.

US Patent:

56546475, Aug 5, 1997

Filed:

Aug 23, 1995

Appl. No.:

8/518408

Inventors:

Thomas F. Uhling - Vancouver WA
David J. Dascher - Colorado Springs CO
Keith C. Griggs - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

G01R 3102

US Classification:

324754

Abstract:

A probe head includes analog amplifier inputs, a ground plane, and hundreds of probe leads between the inputs and the pins of a circuit under test. The customer defines the grounded pins of the circuit under test. Non-active probe leads, i. e. leads corresponding to the grounded pins are connected to the ground plane, maximizing the connections between the grounds of the probe and the circuit under test and minimizing unequal ground potentials. The probe circuit is on a probe circuit board, while the connections between the ground plane and the leads are fusible elements on a separate ground personality board. The probe is placed on a simulated circuit under test, the grounded pins on the circuit under test are protected by an insulating cap, and a voltage is placed on the remainder of the pins to fuse the elements corresponding the active probe leads.

US Patent:

56546696, Aug 5, 1997

Filed:

May 2, 1996

Appl. No.:

8/643134

Inventors:

Thomas F. Uhling - Monument CO
Keith C. Griggs - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

H03F 368

US Classification:

330 51

Abstract:

A first amplifier channel between an input and output includes an input transistor emitter and a first output transistor emitter connected together to form a first emitter pair. A current source is connected to the emitter pair via a transistor which is controlled by a latch. Programming the latch permits the channel to be turned on or off. The emitter pair is connected to a positive voltage through a resistor and to ground through a diode to force it to a controlled off voltage, which prevents signals from passing when the channel is off. There is a output driver amplifier in a feedback circuit. An outdisable circuit controls the voltage and current of the output driver amplifier to place the output in a state in which it appears electrically as an open circuit when the channel is off. Multiple programmable amplifiers can be combined to make a multiplexer, a selectable gain circuit, or a selectable attenuation circuit, all with high band width and high signal integrity.

US Patent:

58983120, Apr 27, 1999

Filed:

Apr 30, 1997

Appl. No.:

8/846814

Inventors:

Thomas F. Uhling - Vancouver WA
David J. Dascher - Colorado Springs CO
Keith C. Griggs - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

G01R 3102

US Classification:

324754

Abstract:

A probe head includes analog amplifier inputs, a ground plane, and hundreds of probe leads between the inputs and the pins of a circuit under test. The customer defines the grounded pins of the circuit under test. Non-active probe leads, i. e. leads corresponding to the grounded pins are connected to the ground plane, maximizing the connections between the grounds of the probe and the circuit under test and minimizing unequal ground potentials. The probe circuit is on a probe circuit board, while the connections between the ground plane and the leads are fusible elements on a separate ground personality board. The probe is placed on a simulated circuit under test, the grounded pins on the circuit under test are protected by an insulating cap, and a voltage is placed on the remainder of the pins to fuse the elements corresponding the active probe leads.

US Patent:

56296177, May 13, 1997

Filed:

Jan 6, 1995

Appl. No.:

8/369607

Inventors:

Thomas F. Uhling - Monument CO
David J. Dascher - Colorado Springs CO
Kenneth Rush - Colorado Springs CO
Keith C. Griggs - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

G01R 104

US Classification:

3241581

Abstract:

An analog electronic test probe includes hundreds of inputs each connected to two amplifiers, each in a separate multiplexer stage on an integrated circuit. A programmer, responsive to a dial, shifts data through a shift register of latches each of which is connected to one of the amplifiers, activating the amplifier(s) connected to the selected input, thereby multiplexing it (them) to selected output(s). Similarly, the gain for each output may be selected. An outdisable circuit connected to the outputs of each multiplexer and the outputs of each IC chip causes each output to appear electrically as an open circuit when no input associated with the multiplexer or chip is selected. This permits any number of multiplexers and IC chips to be daisy-chained together.