Byron A Alcorn

US Patent:

6559852, May 6, 2003

Filed:

Jul 31, 1999

Appl. No.:

09/364972

Inventors:

Jon L Ashburn - Fort Collins CO
Darel N Emmot - Ft Collins CO
Byron A Alcorn - Ft Collins CO

Assignee:

Hewlett Packard Development Company, L.P. - Houston TX

International Classification:

G06F 1328

US Classification:

345533, 345422, 345570, 345503, 710112, 710310

Abstract:

Frame buffer memory bandwidth is conserved by performing a depth comparison between colliding pixels at batch building time. If the incoming pixel fails the depth comparison, then it may be âtossedâ and excluded from any batches currently under construction. The batch building process may then continue without the need for a batch flush responsive to the occurrence of the pixel collision. If the incoming pixel passes the depth comparison, then it may yet be possible to avoid flushing: The current rendering mode of the pipeline is determined. If the current rendering mode does not require read-modify-write operations, then the incoming pixel may be merged with the buffered pixel with which it collides. Merger of the two pixels may be accomplished by overwriting the buffered RGBA pixel components with those of the incoming pixel, but only those components corresponding to asserted bits in the incoming pixels BEN. The buffered BEN may be replaced with the logical OR of the stored BEN and the incoming pixels BEN.

US Patent:

6621500, Sep 16, 2003

Filed:

Nov 17, 2000

Appl. No.:

09/715882

Inventors:

Byron A Alcorn - Ft Collins CO
Joseph Norman Gee - Ft Collins CO
Kevin Lefebvre - Ft Collins CO
Don B. Hoffman - Fort Collins CO

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G09G 500

US Classification:

345629, 345630, 345632, 345589, 345594, 345598, 345606

Abstract:

A preferred method includes the step of receiving multiple digital video data streams. Preferably, a first of the multiple digital video data streams contains processed pixel data corresponding to at least a portion of the image to be rendered, and a second of the multiple digital video data streams contains processed pixel data corresponding to at least a portion of the image to be rendered as well as information, such as a chroma-key value, associated with at least some of the processed pixel data. The embodiment also preferably includes the step of combining the multiple digital video data streams into the composite digital video data stream by referencing the chroma-key values. Devices also are provided.

US Patent:

6636225, Oct 21, 2003

Filed:

Aug 27, 2001

Appl. No.:

09/940039

Inventors:

Byron A. Alcorn - Fort Collins CO
Darel N. Emmot - Fort Collins CO

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06T 1140

US Classification:

345552, 345538, 345587

Abstract:

A method and apparatus for managing texture mapping data in a computer graphics system, the computer graphics system including a host computer, primitive rendering hardware and a primitive data path extending between the host computer and the primitive rendering hardware. The host computer passes primitives to be rendered by the system to the primitive rendering hardware over the primitive data path. The host computer has a main memory that stores texture mapping data corresponding to the primitives to be rendered. The primitive rendering hardware includes a local texture memory that locally stores the texture mapping data corresponding to at least one of the primitives to be rendered. When a primitive passed to the primitive rendering hardware is to be rendered, a determination is made as to whether its corresponding texture mapping data is in the local texture memory. When the texture mapping data corresponding to the primitive to be rendered is in the local texture memory, the primitive is rendered using its corresponding texture mapping data from the local texture memory. When the texture mapping data corresponding to the primitive to be rendered is not in the local texture memory, the texture mapping data corresponding to the primitive to be rendered is downloaded from the host computer main memory to the primitive rendering hardware, and the primitive is rendered using its corresponding texture mapping data downloaded from the main memory.

US Patent:

6657632, Dec 2, 2003

Filed:

Jan 24, 2001

Appl. No.:

09/768664

Inventors:

Darel N Emmot - Ft Collins CO
Byron A Alcorn - Ft Collins CO

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06F 1516

US Classification:

345502, 345505, 345506, 711118, 712 10, 712 11

Abstract:

A system is described that is broadly directed to a system of integrated circuit components. The system comprises a plurality of nodes that are interconnected by communication links. A random access memory (RAM) is connected to each node. At least one functional unit is integrated into each node, and each functional unit is configured to carry out a predetermined processing function. Finally, each RAM includes a coherency mechanism configured to permit only read access to the RAM by other nodes, the coherency mechanism further configured to permit write access to the RAM only by functional units that are local to the node.

US Patent:

6661424, Dec 9, 2003

Filed:

Jul 7, 2000

Appl. No.:

09/611503

Inventors:

Byron A Alcorn - Ft Collins CO
Darel N Emmot - Ft Collins CO

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G09G 500

US Classification:

345611, 345581

Abstract:

Methods and apparatus are provided for performing scene anti-aliasing in a computer graphics system including a rasterizer, a texture mapping subsystem and a frame buffer. The method includes the steps of defining a supersample image buffer and a single sample image buffer, using the rasterizer to render a supersampled image to the supersample image buffer, and using the texture mapping subsystem to downsample the supersample image to the single sample image buffer. The downsampled image in the single sample image buffer is anti-aliased. The supersample image buffer and the single sample image buffer are preferably allocated in the frame buffer. The downsampling operation is preferably performed at the time of double buffer swap.

US Patent:

6680737, Jan 20, 2004

Filed:

Dec 12, 2002

Appl. No.:

10/317526

Inventors:

Jon L Ashburn - Fort Collins CO
Darel N Emmot - Ft Collins CO
Byron A Alcorn - Ft Collins CO

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G09G 539

US Classification:

345531, 345533, 345570, 345421, 710 39, 710 54, 710310

Abstract:

Frame buffer memory bandwidth is conserved by performing a depth comparison between colliding pixels at batch building time. If the incoming pixel fails the depth comparison, then it may be âtossedâ and excluded from any batches currently under construction. The batch building process may then continue without the need for a batch flush responsive to the occurrence of the pixel collision. If the incoming pixel passes the depth comparison, then it may yet be possible to avoid flushing: The current rendering mode of the pipeline is determined. If the current rendering mode does not require read-modify-write operations, then the incoming pixel may be merged with the buffered pixel with which it collides. Merger of the two pixels may be accomplished by overwriting the buffered RGBA pixel components with those of the incoming pixel, but only those components corresponding to asserted bits in the incoming pixels BEN. The buffered BEN may be replaced with the logical OR of the stored BEN and the incoming pixels BEN.

US Patent:

6707453, Mar 16, 2004

Filed:

Nov 21, 2000

Appl. No.:

09/718952

Inventors:

Theodore G Rossin - Fort Collins CO
Byron A Alcorn - Ft Collins CO

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06T 1510

US Classification:

345426

Abstract:

A rasterizer implementing a single edge stepping interpolator to interpolate both diffuse and specular lighting components across an edge of the primitive, and/or a single span stepping interpolator to interpolate both diffuse and specular lighting components across the spans of the primitive. When the edge or span being interpolated includes a non-negligible specular lighting component, the diffuse and specular lighting components are separately and successively rasterized. Otherwise, only the diffuse lighting component is interpolated over the edge or span.

US Patent:

6724396, Apr 20, 2004

Filed:

Jun 1, 2000

Appl. No.:

09/586412

Inventors:

Darel N Emmot - Ft Collins CO
Byron A Alcorn - Ft Collins CO

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G09G 500

US Classification:

345587, 345582

Abstract:

Methods and apparatus are provided for allocating correlated data sets, such as texture data, among first and second areas of memory in a computer graphics system. Each texture map in a series of texture maps is divided into a set of blocks of data. Each texture map that has a width greater than one block is divided into first and second map areas. Typically, the first and second map areas are the left and right halves of each texture map. Blocks of data from the first map areas of odd level texture maps are stored in the first memory area, blocks of data from the second map areas of even level texture maps are stored in the first memory area, blocks of data from the second map areas of odd level texture maps are stored in the second memory area and blocks of data from the first map areas of even level texture maps are stored in the second memory area. The blocks of data representing each texture map in the series of texture maps are stored in consecutive blocks of memory. The disclosed technique for allocating texture data to memory provides high performance during texture mapping operations.