Andrew J Bonthron

US Patent:

8093714, Jan 10, 2012

Filed:

Dec 10, 2009

Appl. No.:

12/635677

Inventors:

Andrew J. Bonthron - Los Angeles CA, US
Darren Jay Walworth - Fullerton CA, US

Assignee:

Semtech Corporation - Camarillo CA

International Classification:

H01L 23/34

US Classification:

257713, 257724, 257704, 257E23101, 257E2319, 438107, 438122

Abstract:

A chip assembly may comprise a substrate having a top surface and a bottom surface. The chip assembly may comprise a first die having a circuit surface and a connecting surface, the circuit surface comprising one or more integrated circuits. The chip assembly may comprise a chip-scale frame having an inside surface, an outside surface, and a well region, the well region having an opening within the inside surface, the well region having a wall, the well region housing the first die, the first die attached to the wall by a first coupling mechanism, the inside surface coupled to the top surface of the substrate by a second coupling mechanism. The chip assembly may comprise a heat sink coupled to the outside surface of the chip-scale frame using a third coupling mechanism.

US Patent:

8150270, Apr 3, 2012

Filed:

Mar 30, 2009

Appl. No.:

12/383910

Inventors:

Andrew John Bonthron - Los Angeles CA, US

Assignee:

Kitel Technologies LLC - Los Angeles CA

International Classification:

H04B 10/04

US Classification:

398188, 398183, 398182

Abstract:

Modulator driver for driving an electro-optical modulator in a high-speed optical communications system. In accordance with aspects of the present invention, a modulator driver is presented comprising an input differential limiting amplifier which is coupled to a distributed differential current-switch configuration, where one set of outputs of the distributed differential current-switch configuration are grounded and the other set of outputs are connected to an artificial transmission line structure generating forward traveling and reverse traveling signals, with the reverse traveling signal termination bias inductively coupled to a separately adjustable positive bias voltage, whereby the circuit architecture reduces the number of components and transitions in the high-speed signal path and is compatible with compact, monolithic fabrication requiring a minimal amount of external components for operation. Other methods and apparatus are presented.

US Patent:

8367469, Feb 5, 2013

Filed:

Jan 10, 2012

Appl. No.:

13/347543

Inventors:

Andrew J. Bonthron - Los Angeles CA, US
Darren Jay Walworth - Fullerton CA, US

Assignee:

Semtech Corporation - Camarillo CA

International Classification:

H01L 21/00

US Classification:

438107, 438108, 438122, 257713, 257724, 257704, 257E23101, 257E2319, 257E215, 257E21511

Abstract:

A method of packaging one or more semiconductor dies is provided. The method includes: providing a first die having a circuit surface and a connecting surface; providing a chip-scale frame having an inside surface and an outside surface, the chip-scale frame having a well region having an opening in the inside surface; coupling the first die to a wall of the well region using a first coupling mechanism for electrical and mechanical coupling; providing a substrate having a top surface and a bottom surface; coupling the inside surface of the chip-scale frame with the top surface of the substrate by a second coupling mechanism, wherein a gap is provided between the circuit surface of the first die and the top surface of the substrate; coupling a heat sink to the outside surface of the chip-scale frame using a third coupling mechanism.

US Patent:

8593221, Nov 26, 2013

Filed:

Nov 18, 2011

Appl. No.:

13/300500

Inventors:

Liping Zhang - Redondo Beach CA, US
Thomas W. Krawczyk - Ladera Ranch CA, US
Andrew J. Bonthron - Los Angeles CA, US
David A. Rowe - Redondo Beach CA, US

Assignee:

Semtech Corporation - Camarillo CA

International Classification:

H03F 3/45

US Classification:

330254, 330261

Abstract:

Examples of circuits and methods are provided for common mode stability and bandwidth broadening. A current generator circuit may include a first and a second transistor. Each of the first and second transistors includes a first, second, and third terminal. The first and second transistors provide a first and a second output current at their corresponding third terminals. A first branch including a first resistor and a first capacitor coupled in series is coupled between the third terminal of the first transistor and the first terminal of the second transistor. A second branch including a second resistor and a second capacitor coupled in series is coupled between the third terminal of the second transistor and the first terminal of the first transistor. The first and the second branches are configured to enable the current generator circuit to provide the first and second currents with improved common mode stability.

US Patent:

20020163984, Nov 7, 2002

Filed:

May 3, 2001

Appl. No.:

09/849581

Inventors:

Vladimir Katzman - Rancho Palos Verdes CA, US
Richard Nottenburg - Princeton NJ, US
Yaozhong Liu - Torrance CA, US
David Farkas - Hermosa Beach CA, US
Loc Chau - Canoga Park CA, US
Andrew Bonthron - Los Angeles CA, US
Christopher Clark - Hermosa Beach CA, US

International Classification:

H04L007/00

US Classification:

375/355000, 375/340000

Abstract:

Apparatus and method for recovering clock and data signals from received transmission line information and for regenerating the recovered clock and data signals. The apparatus comprises a clock detector for recovering and generating a clock signal from the received transmission line information and a data detector for recovering and regenerating data contained in the received transmission line information and directional coupling apparatus for magnetically coupling the received transmission line information with the clock and data circuitry.

US Patent:

20030147428, Aug 7, 2003

Filed:

Jun 26, 2001

Appl. No.:

09/892807

Inventors:

Andrew Bonthron - Los Angeles CA, US
Richard Nottenburg - Princeton NJ, US

International Classification:

H04J003/04

US Classification:

370/533000, 370/213000

Abstract:

Apparatus for driving an optical system modulator to modulate data signals onto a light wave of the optical system. The modulator driver apparatus has a limited amplifier for receiving multiplexed low speed binary data signals and for generating amplified and limited frequency output signals representative of the received multiplexed binary data signals. A differential amplifier connected to an output of the limited amplifier precisely controls the amplitude and generates a low level of over and undershoot of output signals over a wide range of the limited amplifier output signals and has an output connected to central processor unit controlled linear amplifier means for generating gain controlled high fidelity output signals characterized with low over and undershoot and a high extinction ratio for driving the modulator.

US Patent:

20050156780, Jul 21, 2005

Filed:

Jan 14, 2005

Appl. No.:

11/036318

Inventors:

Andrew Bonthron - Los Angeles CA, US
Gerald Juskovic - Newport Beach CA, US

International Classification:

G01S013/93

US Classification:

342107000, 342070000, 342196000, 342134000, 342137000, 342139000

Abstract:

Methods and apparatus are presented that reduce the overall system cost for automotive radar sensing applications through reduction of the number of the radar sensors required. In accordance with aspects of the present invention, one way sensor count reduction can be achieved is through the combination of target range, direction, and velocity determination capability with wide angular field of view coverage within a single sensor unit. One embodiment combines a wide field of view antenna means with a wideband/ultra-wideband/precision-ultra-wideband radar transmitter-receiver and an interferometric direction-finding means into a single sensor unit. Other methods and apparatus are presented.

US Patent:

20050225481, Oct 13, 2005

Filed:

Apr 8, 2005

Appl. No.:

11/102499

Inventors:

Andrew Bonthron - Los Angeles CA, US

International Classification:

G01S007/28

US Classification:

342175000, 342070000

Abstract:

Methods and apparatus are presented which reduce the overall cost and increase the imaging capability for medium and long range automotive radar sensing applications through the combination of a high signal-to-noise ratio and wide dynamic range radar waveform and architecture, antenna arrangement, and a low cost packaging and interconnection method. In accordance with aspects of the present invention, one way a high signal-to-noise ratio and wide dynamic range imaging radar with reduced cost can be achieved is through the combination of a pulsed stepped-frequency-continuous-wave waveform and electrically beam-switched radar architecture, utilizing a planar package containing high-frequency integrated circuits as well as integrated high-frequency waveguide coupling ports, coupled to a multi-beam waveguide-fed twist-reflector narrow beam-width antenna. Other methods and apparatus are presented.