Terry Lee Matula

US Patent:

8429432, Apr 23, 2013

Filed:

Oct 22, 2009

Appl. No.:

12/603993

Inventors:

Terry Matula - Austin TX, US
Vaibhav P. Sapre - Austin TX, US
Stephen Seitsinger - Austin TX, US
John Stuewe - Round Rock TX, US

Assignee:

Dell Products L.P. - Round Rock TX

International Classification:

G06F 1/26

US Classification:

713300, 713310, 713320, 713321, 713322, 713323, 713324, 713330, 713340

Abstract:

A power supply system includes a power supply coupled to a load via a main power rail, and a switch coupled between the power supply and the load on an auxiliary power rail. A controller controls the switch to couple the auxiliary power rail to the load in response to a startup command, and the controller controls the switch to uncouple the load from the auxiliary power rail in response to a shut down command and a low power mode being enabled.

US Patent:

6795926, Sep 21, 2004

Filed:

May 28, 1999

Appl. No.:

09/322296

Inventors:

Terry L. Matula - Austin TX
John R. Stuewe - Cedar Park TX

Assignee:

Dell USA, L.P. - Round Rock TX

International Classification:

G06F 126

US Classification:

713300, 713310

Abstract:

A gating circuit for a computer system to prevent a power management signal provided by a computer card slot connector or a system board mounted device to change the power state of the computer system from a lower power state to a higher power state when the chassis of the computer system is open. The computer system includes a chassis intrusion detection switch to provide an indication of whether the chassis is open. In one example, the computer card connector is a card slot connector that conforms to the PCI or AGP computer bus standards, and the power management signal is a PME# signal. The gating circuit also prevents a wake on LAN (WOL) signal received via a jumper from a WOL circuit from changing the power state of the computer system from a lower power state to a higher power state. When the gating circuit receives an indication that the computer system is in a powered up power state, the gating circuit provides a gated power signal to change the power state of the computer system in response to receiving a PME# or WOL signal regardless of whether the chassis is open or closed. The computer system implements a power management strategy such as the Advanced Configuration and Power Interface power strategy.

US Patent:

20220179494, Jun 9, 2022

Filed:

Dec 3, 2020

Appl. No.:

17/110754

Inventors:

- Round Rock TX, US
Terry Lane Matula - Austin TX, US
Deeder M. Aurongzeb - Austin TX, US

International Classification:

G06F 3/01

Abstract:

A system for provisioning information to a user comprises a first display for displaying information for an application executing on an information handling system and a second display with a first zone for displaying information associated with the application and a second zone for displaying information associated with the information handling system. A biometric sensor determines which display the user is viewing. If the user is viewing the first display, eye tracking software determines actions based on the application. If the user is viewing the second display, eye tracking software determines if the user is viewing the first zone or the second zone. If the user is viewing the first zone, advanced or additional information associated with the application is displayed. If the user is viewing the second zone, advanced or additional information associated with the information handling system is displayed.

US Patent:

20200394076, Dec 17, 2020

Filed:

Jun 11, 2019

Appl. No.:

16/438062

Inventors:

- Round Rock TX, US
Terry Matula - Austin TX, US

International Classification:

G06F 9/50
G06F 13/42
G06F 11/22
G06F 9/4401

Abstract:

Information handling systems (IHSs) and methods are provided herein to allocate Peripheral Component Interconnect Express (PCIe) bus resources to a plurality of PCIe slots according to various PCIe bus resource allocation option settings. At least one host processor is included within the IHS for executing program instructions to detect a PCIe bus allocation option setting selected from a plurality of options provided in a boot firmware setup menu; determine if the PCIe bus allocation option setting has changed since the IHS was last booted; and allocate PCIe bus resources to the plurality of PCIe slots according to the detected PCIe bus allocation option setting. The plurality of options provided in the boot firmware setup menu include at least an auto detect option, which when selected, enables the at least one host processor to automatically detect unused PCIe slots and reallocate PCIe bus resources to used PCIe slots.

US Patent:

20190288538, Sep 19, 2019

Filed:

Mar 19, 2018

Appl. No.:

15/924849

Inventors:

- Round Rock TX, US
Terry L. Matula - Austin TX, US

Assignee:

Dell Products L.P. - Round Rock TX

International Classification:

H02J 7/00
H01M 10/44

Abstract:

A battery includes plural battery cells that output a source voltage to power a device, such as an information handling system. A controller of the battery disconnects each battery cell at a predetermined interval for a predetermined time period, such as from a range of between 15 and 60 seconds, while maintaining the source voltage. The predetermined time and interval are selected based upon the load supplied by the battery and an estimated increase in battery output efficiency.

US Patent:

20190278350, Sep 12, 2019

Filed:

May 30, 2019

Appl. No.:

16/426136

Inventors:

- Round Rock TX, US
Terry L. Matula - Austin TX, US

International Classification:

G06F 1/26
G06F 13/10
G06F 1/3234

Abstract:

A computing system includes a system board having a system controller device with an interrupt input. A system expansion bus connector is located on the system board and includes power pin(s) and an interrupt signal pin connected to the interrupt input. A peripheral device expansion card system is coupled to the computing system through system expansion bus connector and includes a system power reporting device coupled to the power pin(s) to receive power from the computing system via the power pin(s), and a card controller device coupled to the system power reporting device and to the interrupt signal pin. The card controller device determines, using the system power reporting device, a power state of the computing system. The card controller device also sends, to the system controller device through the interrupt signal pin, an interrupt signal that the system controller device interprets as a hot plug event.

US Patent:

20190056773, Feb 21, 2019

Filed:

Aug 15, 2017

Appl. No.:

15/677828

Inventors:

- Round Park TX, US
Terry L. Matula - Austin TX, US

International Classification:

G06F 1/32
G06F 13/10

Abstract:

A computing system includes a system board having a system controller device with an interrupt input. A system expansion bus connector is located on the system board and includes power pin(s) and an interrupt signal pin connected to the interrupt input. A peripheral device expansion card system is coupled to the computing system through system expansion bus connector and includes a system power reporting device coupled to the power pin(s) to receive power from the computing system via the power pin(s), and a card controller device coupled to the system power reporting device and to the interrupt signal pin. The card controller device determines, using the system power reporting device, a power state of the computing system. The card controller device also sends, to the system controller device through the interrupt signal pin, an interrupt signal that the system controller device interprets as a hot plug event.

Address:

215 Sweetgum St, League City, TX 77573

Phone:

281-316-9925

VIN:

JTDKB20U377611742

Make:

TOYOTA

Model:

PRIUS

Year:

2007