John T Larson

US Patent:

6340794, Jan 22, 2002

Filed:

Dec 16, 1996

Appl. No.:

08/763390

Inventors:

Robert A. Wandmacher - Cedar Park TX
Lawrence C. Chor - Austin TX
John T. Larson - Austin TX

Assignee:

Minnesota Mining and Manufacturing Company - St. Paul MN

International Classification:

H02G 15064

US Classification:

174 731

Abstract:

A two-part system for electrical stress control includes a conformable stress control material positioned at the shield cut edge of a prepared power cable and a stress control tube over the conformable stress control material. A second region of conformable stress control material is positioned adjacent the cut end of the insulation. Relationships are revealed which relate the permittivity and dimensional parameters of the two components.

US Patent:

6428611, Aug 6, 2002

Filed:

Nov 27, 2000

Appl. No.:

09/721725

Inventors:

Anthony J. Andolino - Champlin MN 55316
John A. Larson - Maple Grove MN 55369

International Classification:

B03C 368

US Classification:

96 25, 55DIG 18, 96 57, 96 63, 96 82

Abstract:

A filter apparatus for use in removing mist, smoke and particles generated by a machine tool includes a mechanical first filtration stage and a second filtration stage consisting of an electrostatic precipitator. A blower device creates a stream of air for entraining and moving mist, smoke and other particles upwardly through the first and second filtration stages. Circuitry is provided selectively opening the circuit to the collector of the electrostatic precipitator. The collector is energized by a lower voltage from the ionizing field when current to the collector is interrupted. By energizing the collector of the electrostatic filter at a low voltage and by operating the blower unit at a low velocity, mist, smoke and other particles are efficiently collected without shorting the collector plates when water based metal working fluids are used.

US Patent:

6665990, Dec 23, 2003

Filed:

Mar 6, 2000

Appl. No.:

09/519823

Inventors:

William K. Cody - Minnetonka MN
John R. Larson - Bloomington MN
Jerome A. Grundtner - Forest Lake MN

Assignee:

Barr Engineering Co. - Minneapolis MN

International Classification:

E02D 2712

US Classification:

52295, 52296, 5274115, 405244, 4052521

Abstract:

An above ground tower foundation uses embedded tension/compression components secured to a ground level cap. The components each terminate distally in a below ground soil or rock anchoring structure. The components embed without deep wide area site excavation or dewatering. The components with their distal anchoring structure provide exceptional bearing and tension capacity to the foundation, and high resistance to overturning moments acting on the tower. The tension/compression components may be straight or tapered piles with distal end helical fins, piles with a distal end grouted soil or rock anchor, caissons with a distal belled section, caissons with a distal end grouted soil or rock anchor, helical screw anchors or any combinations thereof Construction of this foundation comprises the following steps. A minimal ground-level excavation is established for the cap. The tension/compression components embed into deep, high-strength soil layers without deep below ground excavation.

US Patent:

6784035, Aug 31, 2004

Filed:

Jan 15, 2003

Appl. No.:

10/342590

Inventors:

John P. Snyder - Edina MN
John M. Larson - Northfield MN

Assignee:

Spinnaker Semiconductor, Inc. - Eden Prairie MN

International Classification:

H01L 21338

US Classification:

438167, 438285, 438590, 438199, 438153, 438752, 257 19, 257192, 257194, 257369, 257351, 257616, 257 20

Abstract:

The present invention is a field effect transistor having a strained semiconductor substrate and Schottky-barrier source and drain electrodes, and a method for making the transistor. The bulk charge carrier transport characteristic of the Schottky barrier field effect transistor minimizes carrier surface scattering, which enables the strained substrate to provide improved power and speed performance characteristics in this device, as compared to conventional devices.

US Patent:

6949787, Sep 27, 2005

Filed:

Aug 9, 2002

Appl. No.:

10/215447

Inventors:

John P. Snyder - Edina MN, US
John M. Larson - Northfield MN, US

Assignee:

Spinnaker Semiconductor, Inc. - Eden Prairie MN

International Classification:

H01L027/95

US Classification:

257310, 257324, 257327

Abstract:

The invention is directed to a device for regulating the flow of electric current with high dielectric constant gate insulating layer and a source and/or drain forming a Schottky contact or Schottky-like region with a substrate and its fabrication method. In one aspect, the gate insulating layer has a dielectric constant greater than the dielectric constant of silicon. In another aspect, the current regulating device may be a MOSFET device, optionally a planar P-type or N-type MOSFET, having any orientation. In another aspect, the source and/or drain may consist partially or fully of a silicide.

US Patent:

6974737, Dec 13, 2005

Filed:

May 16, 2003

Appl. No.:

10/440498

Inventors:

John P. Snyder - Edina MN, US
John M. Larson - Northfield MN, US

Assignee:

Spinnaker Semiconductor, Inc. - Eden Prairie MN

International Classification:

H01L021/8238

US Classification:

438199, 438581

Abstract:

A CMOS device and method of fabrication are disclosed. The present invention utilizes Schottky barrier contacts for source and/or drain contact fabrication within the context of a CMOS device and CMOS integrated circuits, to eliminate the requirement for halo/pocket implants, shallow source/drain extensions to control short channel effects, well implant steps, and complex device isolation steps. Additionally, the present invention eliminates the parasitic bipolar gain associated with CMOS device operation, reduces manufacturing costs, tightens control of device performance parameters, and provides for superior device characteristics as compared to the prior art. The present invention, in one embodiment, uses a silicide exclusion mask process to form the dual silicide Schottky barrier source and/or drain contact for the complimentary PMOS and NMOS devices forming the CMOS device.

US Patent:

7221019, May 22, 2007

Filed:

Jun 28, 2006

Appl. No.:

11/478478

Inventors:

John P. Snyder - Edina MN, US
John M. Larson - Northfield MN, US

Assignee:

Spinnaker Semiconductor, Inc. - Bloomington MN

International Classification:

H01L 29/76

US Classification:

257327

Abstract:

A MOSFET device and method of fabricating is provided. The MOSFET device and method of fabricating utilizes Schottky barrier contacts for source and/or drain contact fabrication within the context of a MOSFET device structure to eliminate the requirement for halo/pocket implants and shallow source/drain extensions to control short channel effects. Additionally, the MOSFET device and method unconditionally eliminates the parasitic bipolar gain associated with MOSFET fabrication, reduces manufacturing costs, tightens control of device performance parameters, and provides for superior device characteristics.

US Patent:

7291524, Nov 6, 2007

Filed:

Oct 4, 2004

Appl. No.:

10/957913

Inventors:

John P. Snyder - Edina MN, US
John M. Larson - Northfield MN, US

Assignee:

Spinnaker Semiconductor, Inc. - Eagan MN

International Classification:

H01L 21/338

US Classification:

438167, 438 92, 438570, 257E21106, 257E21131

Abstract:

A method of fabricating a transistor device for regulating the flow of electric current is provided wherein the device has Schottky-barrier metal source-drain contacts. The method, in one embodiment, utilizes an isotropic etch process prior to the formation of the metal source-drain contacts to provide better control of the Schottky-barrier junction location to a channel region. The improvements from the controllability of the placement of the Schottky-barrier junction enables additional drive current and optimizes device performance, thereby significantly improving manufacturability.