Stephen Lars Jenkins

US Patent:

20220366097, Nov 17, 2022

Filed:

May 12, 2021

Appl. No.:

17/318945

Inventors:

- Melbourne FL, US
Stephen N. JENKINS - Layton UT, US
Seth J. THORUP - Sandy UT, US

International Classification:

G06F 30/20
G06F 9/445
G06F 9/30

Abstract:

One embodiment illustrated herein includes a hardware system for simulating a network physical layer for communication channels. The hardware system includes a plurality of hardware processors configurable to model a network physical layer and communication channels. The hardware processors include an opcode processing unit. The hardware processors further include a programmable state machine coupled to the opcode processing unit. The programmable state machine is configured to be programmed by the opcode processing unit using a low-level hardware programming language comprising opcodes having waveform processing specific semantics so as to configure the state machine for specific waveforms or specific network physical layer characteristics.

US Patent:

20220368598, Nov 17, 2022

Filed:

May 12, 2021

Appl. No.:

17/318923

Inventors:

- Melbourne FL, US
Kyle R. MORREY - Farmington UT, US
Stephen N. JENKINS - Layton UT, US
Brent A. KENNEY - Bountiful UT, US
Benjamin C. DEAN - Tucson AZ, US
Lee F. CARTER - Salt Lake City UT, US

International Classification:

H04L 12/24

Abstract:

A hardware system for simulating a network physical layer for communication channels. The hardware system includes a plurality of hardware processors configurable to model a physical layer and communication channels. The hardware system includes a first interface coupled to the plurality of hardware processors. The first interface is configured to be coupled to a software simulator comprising a physics model configured to provide model parameters based on modeled communication hardware and a temporal modeling scenario. A second interface is coupled to the plurality of hardware processors. The second interface is configured to be coupled to simulated or real nodes for sending and receiving network data to and from the nodes. The hardware processors are configured to model effects of the physical layer and communication channels on the network data.

US Patent:

20220368599, Nov 17, 2022

Filed:

May 12, 2021

Appl. No.:

17/318937

Inventors:

- Melbourne FL, US
Kyle R. MORREY - Farmingotn UT, US
Stephen N. JENKINS - Layton UT, US
Brent A. KENNEY - Bountiful UT, US

International Classification:

H04L 12/24
H04L 12/823

Abstract:

A system for simulating lost data packets. The system includes a first hardware register storing data for fast factors. The fast factors include factors that are time independent with respect to particular data packets. A second hardware register stores slow factors. The slow factors include factors that are time dependent on data packets. Synchronization hardware is coupled to the second hardware register and synchronizes the slow factors with specific data inputs based on dependencies on the data packets. A hardware adder is coupled to the first hardware register and the second hardware register to compute a link budget. The link budget is used in determine probability of loss of data packets. A hardware processor coupled to the hardware adder determines, based on the link budget, if a data packet should be dropped, and when the data packet should be dropped, drops the data packet for simulating a network physical layer.

US Patent:

20220368601, Nov 17, 2022

Filed:

May 12, 2021

Appl. No.:

17/318963

Inventors:

- Melbourne FL, US
Christopher S. HEFFERNAN - South Jordan UT, US
Seth J. THORUP - Sandy UT, US
Stephen N. JENKINS - Layton UT, US
Stephen M. DUDLEY - South Jordan UT, US

International Classification:

H04L 12/24
H04L 29/06
H04L 12/713

Abstract:

A hardware system for simulating a network physical layer for communication channels. The hardware system includes a plurality of hardware processors configurable to model a network physical layer and communication channels. The hardware system is further implemented where the hardware processors are configured such that a single set of hardware, including a single set of gates and registers, is used in a single simulation to model a plurality of virtual routers for different nodes.

US Patent:

20150097353, Apr 9, 2015

Filed:

Oct 3, 2013

Appl. No.:

14/045659

Inventors:

- Goshen IN, US
Chad Johnson - Kaysville UT, US
Stephen W. Jenkins - Union MI, US

Assignee:

LIPPERT COMPONENTS, INC. - Goshen IN

International Classification:

B60R 3/02

US Classification:

280166

Abstract:

A motorized retractable step apparatus includes one or more steps that move between a retracted position and a deployed position. The step apparatus includes a drive member that spans the length of the step apparatus and rotates to retract or deploy the steps. The step apparatus uses a direct drive configuration to transfer power from an electric motor to the drive member. The step apparatus can also includes a brake coupled to the electric motor and/or extruded aluminum steps. These features simplify construction of the step apparatus and make it more reliable than conventional motorized steps.