Peter S Wood

Address:

2809 Scenic Dr, Austin, TX 78703

VIN:

5TFRV54167X008761

Make:

TOYOTA

Model:

TUNDRA

Year:

2007

US Patent:

6627961, Sep 30, 2003

Filed:

May 5, 2000

Appl. No.:

09/565151

Inventors:

Richard Francis - Manhattan Beach CA
Ranadeep Dutta - Redondo Beach CA
Chiu Ng - El Segundo CA
Peter Wood - Rolling Hills Estates CA

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H01L 2972

US Classification:

257378, 257379, 257391, 257544

Abstract:

A high voltage MOSgated semiconductor device has a generally linear MOSFET type forward current versus forward voltage characteristic at low voltage and the high current, low forward drop capability of an IGBT. The device is particularly useful as the control transistor for a television tube deflection coil. The device is formed by a copacked discrete IGBT die and power MOSFET die in which the ratio of the MOSFET die area is preferably about 25% that of the IGBT. Alternatively, the IGBT and MOSFET can be integrated into the same die, with the IGBT and MOSFET elements alternating laterally with one another and overlying respective P injection regions and N contact regions respectively on the bottom of the die. The MOSFET and IGBT elements are preferably spaced apart by a distance of about 1 minority carrier length (50-100 microns for a 1500 volt device).

US Patent:

7321210, Jan 22, 2008

Filed:

Apr 3, 2006

Appl. No.:

11/396758

Inventors:

Peter N Wood - Rolling Hills Estates CA, US

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H02P 1/18

US Classification:

318254, 318138, 318439, 318599

Abstract:

Disclosed is a variable speed brushless direct current (BLDC) motor drive circuit. The circuit includes a plurality of high-side and low-side controlled switches coupled in a three-phase bridge configuration for commutating a BLDC motor, each phase of the bridge being connected to a corresponding phase of the motor, a controller for providing a drive signal to drive each of the high-side and low-side switches, and a speed control loop for controlling the motor by PWM of a DC bus voltage to achieve a constant motor speed. The speed control loop includes a pulse circuit receiving the drive signals provided from the controller for controlling the high-side switches and for providing a pulse signal that is related to a desired motor speed, a plurality of high-side drivers for driving the high-side switches, each high-side switch being coupled to a respective high-side driver, and a plurality of gating circuits each receiving the pulse signal from the pulse circuit and a drive signal for a respective high-side controller from the controller for generating a pulse width modulation (PWM) control signal having a pulse duration determined by said pulse signal from said pulse circuit to thereby drive each of the high-side drivers to modulate their corresponding high-side switches.

US Patent:

20060139020, Jun 29, 2006

Filed:

Dec 13, 2005

Appl. No.:

11/302544

Inventors:

Peter Wood - Rolling Hills Estates CA, US
Maurizio Salato - Torrance CA, US

International Classification:

G05F 1/40
G05F 1/56

US Classification:

323283000

Abstract:

A boost type power supply circuit for providing a DC output voltage comprising first and second semiconductor switches coupled between respective input lines and a common connection, an AC input voltage from an AC source being supplied across the input lines; first and second diodes coupled in series with respective ones of the switches; third and fourth diodes coupled across respective ones of the switches in a free-wheeling relationship with the switches, an inductance coupled in at least one of the input lines; a controller for controlling the conduction times of the switches by providing a pulse width and phase modulated control signal to each of the switches; whereby the controller turns on at least one of the switches during a positive half cycle of the AC voltage to allow energy storage in the inductance and turns off the at least one switch to allow the energy stored in the inductance to be supplied to an attached load through one of the first and second diodes and one of the third or fourth diodes; and the controller turns on at least one of the switches during a negative half cycle of the AC voltage to allow energy storage in the inductance and turns off the at least one switch to allow the energy stored in the inductance to be supplied to the attached load through one of the first and second diodes and one of the third and fourth diodes; and wherein the controller determines an on-time and an off-time of a pulse of the pulse width modulated control signal during each half cycle of the AC voltage based on at least one input without requiring sensing of the input current from the AC source; the on-time and off-time of the pulse being controlled to regulate said output voltage and to provide power factor correction of said AC input voltage.

US Patent:

20060198172, Sep 7, 2006

Filed:

Mar 29, 2006

Appl. No.:

11/392039

Inventors:

Peter Wood - Rolling Hills Estates CA, US

International Classification:

H02M 7/04
H02M 5/42

US Classification:

363089000

Abstract:

A boost type power supply circuit for providing a DC output voltage comprising first and second semiconductor switches coupled between respective input lines and a common connection; an AC input voltage from an AC source being supplied across the input lines; first and second diodes coupled in series with respective ones of the switches; third and fourth diodes coupled across respective ones of the switches in a free-wheeling relationship with the switches; an inductance coupled in at least one of the input lines; a controller for controlling the conduction times of the switches by providing a pulse width control signal to each of the switches; wherein the controller turns on at least one of the switches during a positive half cycle of the AC voltage to allow energy storage in the inductance and turns off the at least one switch to allow the energy stored in the inductance to be supplied to an attached load through one of the first and second diodes and one of the third or fourth diodes; and the controller turns on at least one of the switches during a negative half cycle of the AC voltage to allow energy storage in the inductance and turns off at least one switch to allow the energy stored in the inductance to be supplied to the attached load through one of the first and second diodes and one of the third and fourth diodes. The controller determines an on-time and an off-time of a pulse of the pulse width modulated control signal during each half cycle of the AC voltage, the on-time and off-time of the pulse being controlled to regulate said output voltage and to provide power factor correction of said AC input voltage, based on either voltage sensing or current sensing.

US Patent:

45118159, Apr 16, 1985

Filed:

Aug 15, 1983

Appl. No.:

6/523121

Inventors:

Peter N. Wood - Los Angeles CA

Assignee:

International Rectifier Corporation - Los Angeles CA

International Classification:

H03K 17687
H03K 1704
H03K 1760
H03K 1768

US Classification:

307584

Abstract:

A high power MOSFET switching circuit which has a larger duty cycle is driven from the output winding of a saturable isolation transformer. The output winding is coupled to the gate of the MOSFET power switch through a series connected control MOSFET device having an inherent parallel-connected diode. The gate capacitance is charged through the diode and is discharged through the control MOSFET when it is turned on. The drive circuit is a low impedance circuit with full isolation between input and output terminals.

US Patent:

60022132, Dec 14, 1999

Filed:

Sep 13, 1996

Appl. No.:

8/713729

Inventors:

Peter N. Wood - Rolling Hills Estates CA

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H05B 3702

US Classification:

315307

Abstract:

A MOS gate drive (MGD) integrated circuit drives a pair of MOS gated power semiconductor devices such as are used in a half bridge circuit to drive a load in a resonant power supply circuit or to drive a gas discharge lamp in a ballast circuit. The gate drive circuit includes dead time circuitry which prevents simultaneous conduction in both MOS gated devices. The duration of the dead time is controlled in response to a feedback signal that is sensed from the output supplied to the load or the lamp. A dimming function is attained by controlling the voltage of the feedback signal.

US Patent:

57962154, Aug 18, 1998

Filed:

Jun 28, 1996

Appl. No.:

8/671655

Inventors:

John Edward Parry - Derby, GB2
Peter N. Wood - Rolling Hills Estates CA

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H05B 3702

US Classification:

315224

Abstract:

A half bridge driver chip for driving a resonant load, such as a ballast, has first and second pairs to which an oscillation frequency timing circuit, matched to the resonant frequency of the load. A constant voltage drop circuit is connected to these input pins to vary the voltage at the pins as a linear function of the input voltage V. sub. cc. Consequently, when V. sub. cc is increasing during the start-up of the circuit, the resonant frequency is initially high but decreases to its operation value as V. sub. cc increases. This produces a soft start characteristic and a timed preheat cycle of the resonant load. In one embodiment, the constant voltage drop circuit is a zener diode; in another embodiment, it is strings of anti-parallel connected diodes.

US Patent:

58054332, Sep 8, 1998

Filed:

Apr 16, 1997

Appl. No.:

8/842713

Inventors:

Peter N. Wood - Rolling Hills Estates CA

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H02M 3337

US Classification:

363 16

Abstract:

A power supply includes a half bridge transistor circuit coupled across a DC bus, where the half bridge transistor circuit includes a high-side transistor and a low-side transistor and produces an output pulse width modulation (PWM) signal and a self oscillating half bridge driver circuit for producing first and second control PWM signals in response to an external threshold signal. The first control PWM signal is coupled to a control terminal of the high-side transistor and the second control PWM signal is coupled to a control terminal of the low-side transistor. The power supply also includes a low pass filter for receiving the output PWM signal and producing a DC output voltage therefrom across a pair of output terminals and a programmable voltage regulating device having an input terminal coupled to the DC output voltage and an output terminal coupled to the external threshold voltage.