Michael O Henderson

US Patent:

6526333, Feb 25, 2003

Filed:

Oct 1, 1997

Appl. No.:

08/941267

Inventors:

Michael G. Henderson - San Jose CA
Ken Nguyen - San Jose CA
Karl S. Johnson - Palo Alto CA

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G05D 2300

US Classification:

700300, 361695

Abstract:

A cooling system for cooling components of a computer is provided. The cooling system includes a DC fan which operates at a speed which is substantially proportional to the voltage that is applied to the fan. A zener diode voltage divider is connected in series between a voltage source and a first input of the fan. The second input of the fan is connected to a reference voltage source. A switch is also connected in series between the voltage source and the first voltage input of the fan so as to be connected in parallel with the zener diode voltage divider. When the switch is in a first position, the voltage produced by the voltage source is applied directly to the fan allowing the fan to operate at a first speed. When the switch is in a second position, the voltage from the voltage source is applied to the first input of the fan through the zener diode such that the first input of the fan receives a second voltage that is less than the first voltage thereby causing the fan to operate at a second speed. The zener diode voltage divider is substantially current independent such that the voltage drop across the zener diode is substantially independent of the current that is drawn by the fan.

US Patent:

6742069, May 25, 2004

Filed:

Oct 30, 2001

Appl. No.:

10/016296

Inventors:

Stephen E. J. Papa - Santa Cruz CA
Carlton G. Amdahl - Fremont CA
Michael G. Henderson - San Jose CA
Don Agneta - Morgan Hill CA
Don Schiro - San Jose CA
Dennis H. Smith - Fremont CA

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G06F 1300

US Classification:

710302, 710314, 710312, 361686, 361731

Abstract:

A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adapter chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one of the network interface modules is removed.

US Patent:

7065600, Jun 20, 2006

Filed:

Mar 23, 2004

Appl. No.:

10/808220

Inventors:

Stephen E. J. Papa - Santa Cruz CA, US
Carlton G. Amdahl - Fremont CA, US
Michael G. Henderson - San Jose CA, US
Don Agneta - Morgan Hill CA, US
Don Schiro - San Jose CA, US
Dennis H. Smith - Fremont CA, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G06F 13/00
H05K 5/00

US Classification:

710302, 710312, 710314, 361686, 361731

Abstract:

A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adaptor chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one the network interface modules is removed.

US Patent:

7263570, Aug 28, 2007

Filed:

May 3, 2006

Appl. No.:

11/417943

Inventors:

Stephen E. J. Papa - Santa Cruz CA, US
Carlton G. Amdahl - Fremont CA, US
Michael G. Henderson - San Jose CA, US
Don Agneta - Morgan Hill CA, US
Don Schiro - San Jose CA, US
Dennis H. Smith - Fremont CA, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G06F 13/00
H05K 5/00

US Classification:

710302, 710312, 710314, 361686, 361731

Abstract:

A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adaptor chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one the network interface modules is removed.

US Patent:

59629339, Oct 5, 1999

Filed:

Oct 1, 1997

Appl. No.:

8/942216

Inventors:

Michael G. Henderson - San Jose CA
Carlton G. Amdahl - Fremont CA
Dennis H. Smith - Fremont CA

Assignee:

Micron Electronics, Inc. - Nampa ID

International Classification:

H01H 3500

US Classification:

307126

Abstract:

A method of cooling computer components is provided. The method comprises positioning the fan adjacent computer components so that the fan is in a position to blow air over the computer components, connecting the fan to a first voltage source through a zener diode voltage divider, connecting the fan to a first voltage source through a switch, manipulating the switch into a first position wherein a first voltage is applied to the fan thereby inducing the fan to operate at a first speed and manipulating the switch into a second position wherein a second voltage is applied to the fan thereby inducing the fan to operate at a second speed which is less than the first speed.

US Patent:

62498347, Jun 19, 2001

Filed:

Oct 1, 1997

Appl. No.:

8/942404

Inventors:

Michael G. Henderson - San Jose CA
Carlton G. Amdahl - Fremont CA
Dennis H. Smith - Fremont CA
Don Agneta - Hill CA

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G06F 1300

US Classification:

710129

Abstract:

A system for expanding the loading capacity of a PCI bus in an information processing system having a multiple bus architecture. In one embodiment, the system comprises a processor-to-PCI bridge connected to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. A plurality of add-in board connectors are coupled to each of the generated PCI buses. In another embodiment, the system comprises two or more processor-to-PCI bridges connected to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. The resulting system expands the loading capacity of a PCI bus while adding resistance to single point failures.

US Patent:

59905824, Nov 23, 1999

Filed:

Oct 1, 1997

Appl. No.:

8/942447

Inventors:

Michael G. Henderson - San Jose CA
Carlton G. Amdahl - Fremont CA
Dennis H. Smith - Fremont CA

Assignee:

Micron Electronics, Inc. - Nampa ID

International Classification:

H05K 720

US Classification:

307139

Abstract:

A cooling system for cooling components of a computer is provided. The cooling system includes a DC fan which operates at a speed which is substantially proportional to the voltage that is applied to the fan. A zener diode voltage divider is connected in series between a voltage source and a first input of the fan. The second input of the fan is connected to a reference voltage source. A switch is also connected in series between the voltage source and the first voltage input of the fan so as to be connected in parallel with the zener diode voltage divider. When the switch is in a first position, the voltage produced by the voltage source is applied directly to the fan allowing the fan to operate at a first speed. When the switch is in a second position, the voltage from the voltage source is applied to the first input of the fan through the zener diode such that the first input of the fan receives a second voltage that is less than the first voltage thereby causing the fan to operate at a second speed. The zener diode voltage divider is substantially current independent such that the voltage drop across the zener diode is substantially independent of the current that is drawn by the fan.

US Patent:

63246082, Nov 27, 2001

Filed:

Oct 1, 1997

Appl. No.:

8/943044

Inventors:

Stephen E. J. Papa - Santa Cruz CA
Carlton G. Amdahl - Fremont CA
Michael G. Henderson - San Jose CA
Don Agneta - Morgan Hill CA
Don Schiro - San Jose CA
Dennis H. Smith - Fremont CA

Assignee:

Micron Electronics - Boise ID

International Classification:

G06F 1300
G06F 116
H05K 500

US Classification:

710103

Abstract:

Methods of removing and replacing data processing circuitry are provided comprising removing a network interface module from the computer without powering down the computer and removing an interface card from the network interface module. The further acts of replacing the interface card into the network interface module and replacing the network interface module into the computer without powering down the network computer are also performed in accordance with this method.