Brian Michael Ditchek

US Patent:

47242230, Feb 9, 1988

Filed:

Dec 11, 1986

Appl. No.:

6/940700

Inventors:

Brian M. Ditchek - Milford MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

H01L 21283

US Classification:

437200

Abstract:

Electrical contacts are made to conductive elements of an array which are embedded in a matrix of silicon with the conductive elements exposed at a surface. The surface is covered with silicon oxide, and an opening is made in the silicon oxide to expose a portion of the matrix and a portion of each of several conductive elements. A silicide-forming metal, for example cobalt, is deposited, the assemblage is heated to cause the cobalt to react with the exposed silicon to form conductive cobalt disilicide. The cobalt disilicide is in ohmic contact with each of the conductive elements at the interfaces therewith and is in rectifying contact with the silicon of the matrix at the interface therewith. Unreacted cobalt overlying the silicon oxide is removed.

US Patent:

52850900, Feb 8, 1994

Filed:

Feb 6, 1992

Appl. No.:

7/832159

Inventors:

Brian M. Ditchek - Milford MA
Marvin Tabasky - Peabody MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

H01L 29812

US Classification:

257281

Abstract:

Electrical ohmic contacts are made to a matrix of silicon having conductive rods embedded therein without making contact to any of the rods. Those rods which extend to the surface in the selected area of the matrix to be contacted are etched to form holes. The holes are filled with insulating polycrystalline silicon. The region of the selected area is heavily doped, and an ohmic contact member is made thereto. The underlying rods are spaced from the ohmic contact member and the heavily-doped region by intervening polycrystalline silicon.

US Patent:

51112540, May 5, 1992

Filed:

Aug 17, 1990

Appl. No.:

7/569355

Inventors:

Mark Levinson - Sudbury MA
Brian M. Ditchek - Milford MA
Philip G. Rossoni - Belmont MA
Frederick Rock - Marlboro MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

H01L 2980
H01L 2948

US Classification:

357 22

Abstract:

A junction field effect transistor having an array of electrically floating gate elements located between the control gate and the drain in the path of current flow from the source to the drain. As the drain voltage increases the depletion zone of the control gate expands until it reaches the nearest floating gate. The maximum electric field at the control gate is clamped while the nearest floating gate increases in potential and its depletion zone expands toward the next floating gate, and so on. In this way the applied voltage is spread over the array of floating gates clamping the maximum electric field at a value that is less than the avalanche breakdown field. Then, the avalanche breakdown voltage of the device is increased.

US Patent:

48291730, May 9, 1989

Filed:

Mar 2, 1987

Appl. No.:

7/020629

Inventors:

Brian M. Ditchek - Milford MA
Mark Levinson - Sudbury MA
Ben G. Yacobi - Natick MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

H01L 2714

US Classification:

250211R

Abstract:

A semiconductor photodetector having a body which includes a matrix of semiconductor material, specifically silicon, having an array of individual rods of conductive material, specifically TaSi. sub. 2, disposed therein. The rods form Schottky barriers with the semiconductor material. An ohmic contact is made to several of the rods at one end, and an ohmic contact is made to the semiconductor material of the matrix. Incident radiation is directed at a surface of the body containing the opposite ends of the rods. A detector is connected between the two ohmic contacts and detects current flow generated in response to incident radiation impinging on the body.

US Patent:

47944382, Dec 27, 1988

Filed:

Mar 16, 1987

Appl. No.:

7/026313

Inventors:

Mark Levinson - Sudbury MA
Ben G. Yacobi - Natick MA
Brian M. Ditchek - Milford MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

H01L 2714
H01L 2948
H01J 4014

US Classification:

357 29

Abstract:

A semiconductor radiation detector having a body which includes a matrix of semiconductor material, specifically silicon, having an array of individual rods of conductive material, specifically TaSi. sub. 2, disposed therein. The rods form Schottky barriers with the semiconductor material. A set of contacts spaced along the length of the body each make ohmic contact to several rods at one end of each rod, and an ohmic contact is made to the semiconductor material of the matrix. Incident radiation is directed at a surface of the body which lies parallel to the rods. Detectors connected to each of the contacts along the length of the body detect current flow generated in the vicinity of the rods associated with each contact member by radiation penetrating into the body to that depth.

US Patent:

47133589, Dec 15, 1987

Filed:

May 2, 1986

Appl. No.:

6/858762

Inventors:

Emel S. Bulat - Framingham MA
Brian M. Ditchek - Milford MA
Scott J. Butler - Rochdale MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

H01L 21283
H01L 21265

US Classification:

437 65

Abstract:

A low resistivity N-type layer is formed at the surface of a high resistivity N-type epitaxial layer which has been grown on a low resistivity N-type substrate of silicon. Parallel grooves are etched through the low resistivity N-type layer into the high resistivity N-type layer forming interposed ridges of silicon. When fabricating junction gate devices, P-type zones are formed at the end walls of the grooves by ion implantation. A layer of silicon oxide is formed on the side walls of the grooves exposing the silicon at the end walls of the grooves and at the surfaces of the ridges. A layer of a silicide-forming metal, specifically cobalt, is deposited. A rapid thermal annealing treatment is performed which causes the cobalt to react with the silicon and form cobalt silicide at the cobalt-silicon interfaces. The cobalt does not react with the silicon oxide at the side walls of the grooves. The unreacted cobalt is removed by an etching solution which does not attack the cobalt silicide.

US Patent:

45373230, Aug 27, 1985

Filed:

Jan 9, 1984

Appl. No.:

6/568995

Inventors:

Brian M. Ditchek - Milford MA
Thomas R. Middleton - Peabody MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

C22C 110
H01J 6136

US Classification:

220 21R

Abstract:

Boron, oxygen, or a mixture thereof, is used as a sintering aid in sintering Mo-Ti alloys. Compounds formed between these sintering aids and the Mo or Ti have thermal expansion coefficients consistent with that of alloys of Mo and Ti. An hermetic member may be made using these constituents. The hermetic member may be used to seal an assembly such as a high pressure sodium lamp.

US Patent:

47552565, Jul 5, 1988

Filed:

May 17, 1984

Appl. No.:

6/611307

Inventors:

Brian M. Ditchek - Milford MA

Assignee:

GTE Laboratories Incorporated - Waltham MA

International Classification:

C30B 1321
C30B 2102
C30B 2910

US Classification:

15662071

Abstract:

Method of forming alternating narrow strips of conductive metal silicide, specifically cobalt disilicide, and silicon on a substrate as of silicon with a silicon dioxide or silicon nitride surface layer. Cobalt and silicon are deposited on the substrate in the mole ratio of the eutectic composition of cobalt disilicide and silicon. A molten zone is caused to traverse these materials which upon resolidification at the trailing edge of the molten zone segregate into the two eutectic phases forming alternating narrow strata or lamellae of cobalt disilicide and silicon.