Brandon Spencer Day

US Patent:

6794924, Sep 21, 2004

Filed:

Aug 21, 2001

Appl. No.:

09/934775

Inventors:

Clifford Curry - Seattle WA
Brandon D. Day - Kent WA
James R. Dean - Redmond WA
Jason D. Moffatt - Kent WA
Kaila G. Raby - Auburn WA

Assignee:

Intersil Corporation - Palm Bay FL

International Classification:

H03K 1762

US Classification:

327408, 327387

Abstract:

A switched current steering device includes a switch activation unit coupled to a set of actual switches and an associated set of dummy switches. Based upon current actual switch states, next actual switch states as specified by a data stream, and current dummy switch states, the switch activation unit selectively generates dummy signals that indicate or specify next dummy switch states. The switch activation unit generates the dummy signals such that the total number of actual switches and dummy switches experiencing state transitions remains constant from one switching cycle to another.

US Patent:

6975163, Dec 13, 2005

Filed:

Mar 30, 2004

Appl. No.:

10/813254

Inventors:

Gustavo J. Mehas - Mercer Island WA, US
James W. Leith - Seattle WA, US
Brandon D. Day - Seattle WA, US

Assignee:

Intersil Americas, Inc. - Milpitas CA

International Classification:

G05F001/10

US Classification:

327540

Abstract:

An IC including a margining control amplifier circuit, first and second offset pins, a margining control pin, select logic, and a mirror amplifier circuit. The margining control amplifier circuit drives current at an output to control voltage at an input based on a reference voltage. The first and second offset pins are provided to couple an external margining voltage divider. The margining control pin has at least two states including an up state and a down state. The select logic selectively switches the output of the margining control amplifier circuit between the first and second offset pins and selectively switches the input of the margining control amplifier circuit between the second and first offset pins based on a state of the margining control pin. The mirror amplifier circuit mirrors voltage across the first and second offset pins across a first margining resistor.

US Patent:

7034586, Apr 25, 2006

Filed:

Jun 10, 2004

Appl. No.:

10/865373

Inventors:

Gustavo J. Mehas - Mercer Island WA, US
James W. Leith - Seattle WA, US
Brandon D. Day - Seattle WA, US

Assignee:

Intersil Americas Inc. - Milpitas CA

International Classification:

H03L 7/00

US Classification:

327143, 323901

Abstract:

A method of starting a DC—DC converter into a precharged output voltage including generating a reference voltage having a linear relationship with the output voltage such that the reference voltage ranges between a minimum and maximum voltage level of a PWM triangular waveform as the output voltage ranges between zero and an input voltage level, and enabling output switching of the DC—DC converter when the reference voltage is approximately equal to a compensation signal generated by an error amplifier comparing the reference voltage with a feedback signal representative of the output voltage. Generating a reference voltage may include applying a first current based on the input voltage through two resistors to develop the minimum and maximum voltage levels, applying the first current in one direction through a third resistor, and applying a second current based on the output voltage through the third resistor in the opposite direction.

US Patent:

7088600, Aug 8, 2006

Filed:

Aug 11, 2004

Appl. No.:

10/915906

Inventors:

Gustavo J. Mehas - Mercer Island WA, US
James W. Leith - Seattle WA, US
Brandon D. Day - Seattle WA, US

Assignee:

Intersil Americas, Inc. - Milpitas CA

International Classification:

H02M 1/00

US Classification:

363 49, 323901

Abstract:

An apparatus for reducing surge currents during startup of a voltage regulator is disclosed that includes circuitry for maintaining a voltage at an FB pin of the voltage regulator substantially equivalent to an output voltage of the voltage regulator.

US Patent:

7227731, Jun 5, 2007

Filed:

Jun 24, 2004

Appl. No.:

10/875697

Inventors:

James W. Leith - Seattle WA, US
Gustavo J. Mehas - Mercer Island WA, US
Brandon D. Day - Seattle WA, US

Assignee:

Intersil Americas Inc. - Milpitas CA

International Classification:

H02H 7/00

US Classification:

361 931, 361 18

Abstract:

Apparatus for providing over-current protection in a power converter device includes a first circuit for providing high-side sinking over-current protection for the power converter device responsive to a phase signal and a high-side over-current signal of the power converter device. A second circuit provides low-side sinking over-current protection for the power converter device responsive to the phase signal and the low-side over-current signal of the power converter device. Finally, a third circuit provides low-side sourcing over-current protection responsive to the phase signal, the low-side over-current protection signal and a power ground signal of the power converter device.

US Patent:

7256623, Aug 14, 2007

Filed:

Aug 25, 2004

Appl. No.:

10/925744

Inventors:

Brandon D. Day - Seattle WA, US
James W. Leith - Seattle WA, US
Gustavo J. Mehas - Mercer Island WA, US

Assignee:

Intersil Americas Inc. - Milpitas CA

International Classification:

H03C 3/00

US Classification:

327101, 327132

Abstract:

A frequency programmable feed forward oscillator and triangular wave generator is disclosed having a first input for receiving an input voltage and a second input for receiving an input current. Circuitry within the device responsive to the input voltage scales the amplitude of a triangle wave form according to the provided input voltage and provides the scaled output voltage at a first output. In conjunction, the circuitry also generates a scaled PWM frequency responsive to the provided input current and provides this at a second output.

US Patent:

7928787, Apr 19, 2011

Filed:

Aug 13, 2004

Appl. No.:

10/917628

Inventors:

Gustavo J. Mehas - Mercer Island WA, US
Chun Cheung - Seattle WA, US
Brandon D. Day - Seattle WA, US

Assignee:

Intersil Americas Inc. - Milpitas CA

International Classification:

H03K 3/00

US Classification:

327205, 327 77

Abstract:

An apparatus for providing programmable hysteresis control using an enable pin of a device is disclosed. An enable pin is configured to receive an input signal to enable and disable an associated device responsive to the input signal. A current sink is attached to the enable pin and is responsive to circuitry that disables the current sink responsive to application of the input signal at a first voltage level and enables the current sink responsive to application of the input signal at a second voltage level.

US Patent:

20190384337, Dec 19, 2019

Filed:

Jun 18, 2018

Appl. No.:

16/011467

Inventors:

- Hamilton, BM
Brandon Day - Seattle WA, US
Yihui Chen - Shanghai, CN
Jie He - Shanghai, CN

International Classification:

G05F 1/575
G05F 1/59
G05F 1/565

Abstract:

The subject disclosure includes paralleling of monolithic embedded low drop-out (LDO) linear regulator power rails to provide additional load current, while maintaining accurate current sharing and balancing between the paralleled LDOs without additional power consumption for different load current requirements. Lossless current sensing is used to sense the current for each channel. An offset generator compares the voltages for a master channel and one or more slave channels, and generates an offset voltage according to the sensed error. The offset voltage is added between an input reference voltage and an output regulated voltage to cancel the offset of each channel, so the current of each channel is substantially the same. The lossless current sensing can be realized with equivalent series resistance compensation or current limit sensing. The offset generator can be realized with a resistor and current mirror topology or an input pair added to an error amplifier input.